From patchwork Sat Feb 2 17:25:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2084481 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id B5CB5DFB79 for ; Sat, 2 Feb 2013 17:29:00 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U1grV-00013x-IP; Sat, 02 Feb 2013 17:26:45 +0000 Received: from mail-pa0-f48.google.com ([209.85.220.48]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U1grJ-00010b-Ac for linux-arm-kernel@lists.infradead.org; Sat, 02 Feb 2013 17:26:34 +0000 Received: by mail-pa0-f48.google.com with SMTP id fa1so2702872pad.35 for ; Sat, 02 Feb 2013 09:26:32 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=g+8rfCsmUZjpJt7u5L6sKIyPuK51GPwe1N6XXSKcPQk=; b=Ora1f3A3KanDa+1nM0P/9k6AjkqXMSIYenJ6QR94JLEWK2juROGieIMhR+43DQlBXJ 435HoUWUOY34VrPb+P5OU+5qQh8MRMOhrQBuxzHXmZRzWUZZd8+412CZ8kqOYcyn4nu9 VqmAoRpKFOBq4LQv2F3pPVzutG1GTraAyKsgg2ryQJBq0HzpCipYGLmai8TcdCAXb3rO LPFbDiDEvTo0jlqi33wKdg953ZNfm4vqm5BpZtyftlCx5FSkNm1laGx8qTTWBaQup23t PXP0L3c6PWf8oto/ZkkHENaM+OZ9K8hnbZpGeULbt1fcyGnN/lKb1Ca/vMWl7uzmAqfY u86A== X-Received: by 10.68.202.97 with SMTP id kh1mr42695628pbc.91.1359825992268; Sat, 02 Feb 2013 09:26:32 -0800 (PST) Received: from localhost.localdomain ([27.115.121.35]) by mx.google.com with ESMTPS id b3sm10434040pax.14.2013.02.02.09.26.26 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 02 Feb 2013 09:26:31 -0800 (PST) From: Haojian Zhuang To: shiraz.hashim@st.com, shiraz.linux.kernel@gmail.com, linux@arm.linux.org.uk, tony@atomide.com, linux-arm-kernel@lists.infradead.org, swarren@nvidia.com Subject: [PATCH v8 04/12] gpio: pl061: allocate irq dynamically Date: Sun, 3 Feb 2013 01:25:45 +0800 Message-Id: <1359825953-15663-5-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359825953-15663-1-git-send-email-haojian.zhuang@linaro.org> References: <1359825953-15663-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQmati2ZQCN69Gc7g/h23RAi2QZNepQOQg9Ckp9NkpNS/FPecy7Ly8T/Et7yaq3JyON/2bT/ X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130202_122633_460885_9C449D0E X-CRM114-Status: GOOD ( 12.82 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.48 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org In original implementation, irq base is always specified in platform data. If it's not specified, pl061 gpio driver can't pass the probe() function since irq base is missing. While moving to device tree, everything should be parsed from DTS file. So allocate irq dynamically for irq base. Signed-off-by: Haojian Zhuang --- drivers/gpio/gpio-pl061.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index b820869..fd26f63 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -211,6 +212,10 @@ static void __init pl061_init_gc(struct pl061_gpio *chip, int irq_base) IRQ_GC_INIT_NESTED_LOCK, IRQ_NOREQUEST, 0); } +static const struct irq_domain_ops pl061_domain_ops = { + .xlate = irq_domain_xlate_twocell, +}; + static int pl061_probe(struct amba_device *adev, const struct amba_id *id) { struct device *dev = &adev->dev; @@ -225,10 +230,14 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) if (pdata) { chip->gc.base = pdata->gpio_base; chip->irq_base = pdata->irq_base; - } else if (adev->dev.of_node) { + } else { chip->gc.base = -1; - chip->irq_base = 0; - } else + chip->irq_base = irq_alloc_descs(-1, 0, PL061_GPIO_NR, 0); + if (chip->irq_base < 0) + return chip->irq_base; + } + if (!irq_domain_add_legacy(adev->dev.of_node, PL061_GPIO_NR, + chip->irq_base, 0, &pl061_domain_ops, chip)) return -ENODEV; if (!devm_request_mem_region(dev, adev->res.start,