From patchwork Sat Feb 2 17:25:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2084521 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 3B7D9DFB79 for ; Sat, 2 Feb 2013 17:29:29 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U1gru-0001I3-K9; Sat, 02 Feb 2013 17:27:10 +0000 Received: from mail-pa0-f43.google.com ([209.85.220.43]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U1grW-00014R-M0 for linux-arm-kernel@lists.infradead.org; Sat, 02 Feb 2013 17:26:47 +0000 Received: by mail-pa0-f43.google.com with SMTP id bh2so460187pad.16 for ; Sat, 02 Feb 2013 09:26:44 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=PTXn85+yhh7XkHPLlhL/W3Zdjmrc7p3qwnYh5PVrplQ=; b=jpY2NFkO+JqtSAlrjmIeI3r/PcBU5AqkgycuPBXuohUw++AnR2qqGv0GFuWQqVSMn2 PdlSBq17yPNNrBN+DXIFfnjBkLg/Gi3UTCuKkyBZL0NILLw+jzmIUr4KG+M9FUPfu8GW Jr7cbeJm0gMspO2MImP5kAnpRxaQFlc3FCHxdJrP3AgfPAhvzTT8ebqB9k7txKgQS1bg 72FHkjRprrt0FGaAGOzm/NXlzBlT9DGjv269A3kF5rBEI4Wg8/T+YEhicLJ42iRQNeMg MlCLO27auT07RK2dl9NPQj0ziUNwMjYczLvQJvPD7V7/izkVy0bR3ON/QPTBWQcZwZia 7ATA== X-Received: by 10.66.76.42 with SMTP id h10mr39225520paw.59.1359826004857; Sat, 02 Feb 2013 09:26:44 -0800 (PST) Received: from localhost.localdomain ([27.115.121.35]) by mx.google.com with ESMTPS id b3sm10434040pax.14.2013.02.02.09.26.38 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 02 Feb 2013 09:26:44 -0800 (PST) From: Haojian Zhuang To: shiraz.hashim@st.com, shiraz.linux.kernel@gmail.com, linux@arm.linux.org.uk, tony@atomide.com, linux-arm-kernel@lists.infradead.org, swarren@nvidia.com Subject: [PATCH v8 06/12] gpio: pl061: bind pinctrl by gpio request Date: Sun, 3 Feb 2013 01:25:47 +0800 Message-Id: <1359825953-15663-7-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359825953-15663-1-git-send-email-haojian.zhuang@linaro.org> References: <1359825953-15663-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQnl/ASXw0aSYpdQ1/hZQ2Boy4AGmPW8d3SRh2CTnJUfproJSwGgkpCOw+bdfSPPLBGR/cGp X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130202_122646_831989_E7FDF2F4 X-CRM114-Status: GOOD ( 11.99 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.43 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add the pl061_gpio_request() to request pinctrl. Create the logic between pl061 gpio driver and pinctrl (pinctrl-single) driver. While a gpio pin is requested, it will request pinctrl driver to set that pin with gpio function mode. So pinctrl driver should append .gpio_request_enable() in pinmux_ops. Signed-off-by: Haojian Zhuang --- drivers/gpio/gpio-pl061.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index fd26f63..292620c 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -61,6 +62,17 @@ struct pl061_gpio { #endif }; +static int pl061_gpio_request(struct gpio_chip *chip, unsigned offset) +{ + /* + * Map back to global GPIO space and request muxing, the direction + * parameter does not matter for this controller. + */ + int gpio = chip->base + offset; + + return pinctrl_request_gpio(gpio); +} + static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) { struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); @@ -251,6 +263,7 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) spin_lock_init(&chip->lock); + chip->gc.request = pl061_gpio_request; chip->gc.direction_input = pl061_direction_input; chip->gc.direction_output = pl061_direction_output; chip->gc.get = pl061_get_value;