From patchwork Sun Feb 3 10:15:51 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2086151 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 209843FCA4 for ; Sun, 3 Feb 2013 10:22:19 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U1wfk-0006XT-Kc; Sun, 03 Feb 2013 10:19:40 +0000 Received: from mail-pb0-f53.google.com ([209.85.160.53]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U1weh-0005Ud-6t for linux-arm-kernel@lists.infradead.org; Sun, 03 Feb 2013 10:18:37 +0000 Received: by mail-pb0-f53.google.com with SMTP id un1so2745010pbc.40 for ; Sun, 03 Feb 2013 02:18:33 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=dRc3lDoH+VH0rYXn7sy2AhR70iYioR7VGesYTANTong=; b=ncB4Smzn7ZakOOydeqL45g12UvAhg1pHDh1taeDBI9bNM0+GfbnuIYpR0ri4vRp5rX 0xmu77bcZPmr6AnbmCB+5uOzIZCoiwuajs6ZlNHkRvLgy3yo8yye07fy2wQfGMHZzBoG KvD89UfgNMA8VcReo8STO/1Cbb2yaF+bZn8dGgEV6SsfOLtFuYRmzUFZHHmhl03B9FVj F/BeWBN/DAnTszHNgZZvPQZOuqQ/50MToezCuBXhrMxCcfUiNA+i1xlY3b1iIuZdDT70 VO6wQLWr5PshUuMgiamOGz9VGY6ppNItAzFjaj2FRDKli2P5HGN7/YNh1606QcZhFOsz zdbw== X-Received: by 10.66.73.167 with SMTP id m7mr43188867pav.68.1359886712948; Sun, 03 Feb 2013 02:18:32 -0800 (PST) Received: from haojian-E6230.domain ([67.198.145.34]) by mx.google.com with ESMTPS id ov4sm14344348pbb.45.2013.02.03.02.18.23 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 03 Feb 2013 02:18:32 -0800 (PST) From: Haojian Zhuang To: linux@arm.linux.org.uk, marek.vasut@gmail.com, robert.jarzmik@free.fr, daniel@caiaq.de, linux-arm-kernel@lists.infradead.org, linus.walleij@linaro.org, grant.likely@secretlab.ca, cxie4@marvell.com, grinberg@compulab.co.il Subject: [PATCH v2 10/10] ARM: dts: support pinmux in pxa910 Date: Sun, 3 Feb 2013 18:15:51 +0800 Message-Id: <1359886551-20950-11-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1359886551-20950-1-git-send-email-haojian.zhuang@linaro.org> References: <1359886551-20950-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQlEJ8KknJTcOWepXTvcWPugFPaxXpJwyNICCnz6CkpxuHIawE4ZXqWlHov8PqNwbsqqrGBp X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130203_051835_438051_407D4321 X-CRM114-Status: GOOD ( 12.16 ) X-Spam-Score: 0.4 (/) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (0.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.53 listed in list.dnswl.org] 3.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add gpio range, pinmux settings in pxa910 dkb DTS file. Signed-off-by: Haojian Zhuang --- arch/arm/boot/dts/pxa910-dkb.dts | 264 ++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/pxa910.dtsi | 29 ++++- 2 files changed, 291 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/pxa910-dkb.dts b/arch/arm/boot/dts/pxa910-dkb.dts index 595492a..72eb6bc 100644 --- a/arch/arm/boot/dts/pxa910-dkb.dts +++ b/arch/arm/boot/dts/pxa910-dkb.dts @@ -170,6 +170,270 @@ rtc: rtc@d4010000 { status = "okay"; }; + gpio-keys { + compatible = "gpio-keys"; + + /* in6, out3, out4 */ + right { + label = "right"; + gpios = <&gcb0 12 0>; + linux,code = <106>; /* KEY_RIGHT */ + }; + num5 { + label = "5"; + gpios = <&gcb0 4 0>; + linux,code = <6>; /* KEY_5 */ + }; + }; + gpio@d4019000 { + status = "okay"; + + /* + * In theorical, some gpios could be routed to + * multiple pins. So define the gpio-ranges in + * board file, not silicon file. + */ + gcb0: gpio@d4019000 { + /* */ + gpio-ranges = <&pmx 0 55 32>; + }; + gcb1: gpio@d4019004 { + /* */ + gpio-ranges = <&pmx 0 87 23 &pmx 23 188 9>; + }; + gcb2: gpio@d4019008 { + /* */ + gpio-ranges = <&pmx 0 197 3 &pmx 3 110 29>; + }; + gcb3: gpio@d4019100 { + /* */ + gpio-ranges = < &pmx 0 139 14 &pmx 14 166 7 + &pmx 21 45 4 &pmx 25 203 1 + &pmx 26 50 4 &pmx 30 27 2>; + }; + }; + pmx: pinmux@d401e000 { + /* pin base, nr pins & gpio function */ + pinctrl-single,gpio-range = < + /* + * GPIO number is hardcoded for range at here. + * In gpio chip, GPIO number is not hardcoded for range. + * Since one gpio pin may be routed to multiple pins, + * define these gpio range in pxa910-dkb.dts not pxa910.dtsi. + */ + &range 55 55 0 /* GPIO0 ~ GPIO54 */ + &range 188 5 1 /* GPIO55 ~ GPIO59 */ + &range 193 7 0 /* GPIO60 ~ GPIO66 */ + &range 110 43 0 /* GPIO67 ~ GPIO109 */ + &range 166 7 0 /* GPIO110 ~ GPIO116 */ + &range 45 4 0 /* GPIO117 ~ GPIO120 */ + &range 50 2 1 /* GPIO122 ~ GPIO123 */ + &range 203 1 0 /* GPIO121 */ + &range 52 1 0 /* GPIO124 */ + &range 53 1 1 /* GPIO125 */ + &range 27 2 0 /* GPIO126 ~ GPIO127 */ + >; + + pinctrl-names = "default"; + pinctrl-0 = <&keypad_pmx_func>; + + uart1_pmx_func: pinmux_uart1_pins@0 { + pinctrl-single,pins = < + 0x198 0x6 /* GPIO47_UART1_RXD */ + 0x19c 0x6 /* GPIO48_UART1_TXD */ + >; + /* slew rate set value, mask */ + pinctrl-single,slew-rate = <0x1000 0x1800>; + /* bias set value, match, mask */ + pinctrl-single,bias-disable = <0x8000 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x4000 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + /* input schmitt set value, mask */ + pinctrl-single,input-schmitt = <0x40 0x70>; + /* input schmitt disable value, match, mask */ + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + uart2_pmx_func: pinmux_uart2_pins@0 { + pinctrl-single,pins = < + 0x150 0x4 /* GPIO29_UART2_CTS */ + 0x154 0x4 /* GPIO30_UART2_RTS */ + 0x158 0x4 /* GPIO31_UART2_TXD */ + 0x15c 0x4 /* GPIO32_UART2_RXD */ + >; + pinctrl-single,slew-rate = <0x1000 0x1800>; + pinctrl-single,bias-disable = <0x0 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + uart3_pmx_func: pinmux_uart3_pins@0 { + pinctrl-single,pins = < + 0x188 0x7 /* GPIO43_UART3_RXD */ + 0x18c 0x7 /* GPIO44_UART3_TXD */ + >; + pinctrl-single,slew-rate = <0x1000 0x1800>; + pinctrl-single,bias-disable = <0x0 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + twsi1_pmx_func: pinmux_twsi1_pins@0 { + pinctrl-single,pins = < + 0x1b0 0x2 /* GPIO53_TWSI_SCL */ + 0x1b4 0x2 /* GPIO54_TWSI_SDA */ + >; + pinctrl-single,slew-rate = <0x1000 0x1800>; + pinctrl-single,bias-disable = <0x0 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + nand_pmx_func: pinmux_nand_pins@0 { + pinctrl-single,pins = < + 0x040 0x0 /* ND_IO0 */ + 0x03c 0x0 /* ND_IO1 */ + 0x038 0x0 /* ND_IO2 */ + 0x034 0x0 /* ND_IO3 */ + 0x030 0x0 /* ND_IO4 */ + 0x02c 0x0 /* ND_IO5 */ + 0x028 0x0 /* ND_IO6 */ + 0x024 0x0 /* ND_IO7 */ + 0x020 0x0 /* ND_IO8 */ + 0x01c 0x0 /* ND_IO9 */ + 0x018 0x0 /* ND_IO10 */ + 0x014 0x0 /* ND_IO11 */ + 0x010 0x0 /* ND_IO12 */ + 0x00c 0x0 /* ND_IO13 */ + 0x008 0x0 /* ND_IO14 */ + 0x004 0x0 /* ND_IO15 */ + 0x044 0x0 /* ND_nCS0 */ + 0x060 0x1 /* ND_ALE */ + 0x05c 0x0 /* ND_CLE */ + 0x054 0x1 /* ND_nWE */ + 0x058 0x1 /* ND_nRE */ + 0x068 0x0 /* ND_RDY0 */ + >; + pinctrl-single,slew-rate = <0x1000 0x1800>; + pinctrl-single,bias-disable = <0x0 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + mmc1_pmx_func1: pinmux_mmc1_pins@0 { + pinctrl-single,pins = < + 0x0a0 0x0 /* MMC1_DATA0 */ + 0x09c 0x0 /* MMC1_DATA1 */ + 0x098 0x0 /* MMC1_DATA2 */ + 0x094 0x0 /* MMC1_DATA3 */ + 0x090 0x0 /* MMC1_DATA4 */ + 0x08c 0x0 /* MMC1_DATA5 */ + 0x088 0x0 /* MMC1_DATA6 */ + 0x084 0x0 /* MMC1_DATA7 */ + 0x0a4 0x0 /* MMC1_CMD */ + 0x0a8 0x0 /* MMC1_CLK */ + >; + pinctrl-single,slew-rate = <0x1800 0x1800>; + pinctrl-single,bias-disable = <0x0 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + mmc1_pmx_func2: pinmux_mmc1_pins@1 { + pinctrl-single,pins = < + 0x0ac 0x0 /* MMC1_CD */ + 0x0b0 0x0 /* MMC1_WP */ + >; + pinctrl-single,slew-rate = <0x1000 0x1800>; + pinctrl-single,bias-disable = <0x0 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + mmc2_pmx_func: pinmux_mmc2_pins@0 { + pinctrl-single,pins = < + 0x180 0x1 /* MMC2_CMD */ + 0x184 0x1 /* MMC2_CLK */ + 0x17c 0x1 /* MMC2_DATA0 */ + 0x178 0x1 /* MMC2_DATA1 */ + 0x174 0x1 /* MMC2_DATA2 */ + 0x170 0x1 /* MMC2_DATA3 */ + >; + pinctrl-single,slew-rate = <0x1000 0x1800>; + pinctrl-single,bias-disable = <0x0 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + ssp1_pmx_func: pinmux_ssp1_pins@0 { + pinctrl-single,pins = < + 0x130 0x1 /* GPIO21_SSP1_SCLK */ + 0x134 0x1 /* GPIO22_SSP1_FRM */ + 0x138 0x1 /* GPIO23_SSP1_TXD */ + 0x13c 0x1 /* GPIO24_SSP1_RXD */ + >; + pinctrl-single,slew-rate = <0x1000 0x1800>; + pinctrl-single,bias-disable = <0x0 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + keypad_pmx_func: pinmux_keypad_pins@0 { + pinctrl-single,pins = < + 0x0dc 0x1 /* GPIO0_MKIN0 */ + 0x0e0 0x1 /* GPIO1_MKOUT0 */ + 0x0e4 0x1 /* GPIO2_MKIN1 */ + 0x0e8 0x1 /* GPIO3_MKOUT1 */ + 0x0ec 0x1 /* GPIO4_MKIN2 */ + 0x0f0 0x1 /* GPIO5_MKOUT2 */ + 0x0f4 0x1 /* GPIO6_MKIN3 */ + 0x0f8 0x1 /* GPIO7_MKOUT3 */ + 0x0fc 0x1 /* GPIO8_MKIN4 */ + 0x100 0x1 /* GPIO9_MKOUT4 */ + 0x10c 0x1 /* GPIO12_MKIN6 */ + >; + pinctrl-single,slew-rate = <0x1000 0x1800>; + pinctrl-single,bias-disable = <0x8000 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x2000 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + nfc_pmx_func: pinmux_nfc_pins@0 { + pinctrl-single,pins = < + 0x120 0x0 /* GPIO17 */ + >; + pinctrl-single,slew-rate = <0x1000 0x1800>; + pinctrl-single,bias-disable = <0x0 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + wlan_pmx_func: pinmux_wlan_pins@0 { + pinctrl-single,pins = < + 0x114 0x0 /* GPIO14 */ + 0x12c 0x0 /* GPIO20 */ + 0x160 0x0 /* GPIO33 */ + 0x164 0x0 /* GPIO34 */ + 0x168 0x0 /* GPIO35 */ + 0x16c 0x0 /* GPIO36 */ + >; + pinctrl-single,slew-rate = <0x1000 0x1800>; + pinctrl-single,bias-disable = <0x0 0x0 0x8000>; + pinctrl-single,bias-pullup = <0x0 0x4000 0x4000>; + pinctrl-single,bias-pulldown = <0x0 0x2000 0x2000>; + pinctrl-single,input-schmitt = <0x40 0x70>; + pinctrl-single,input-schmitt-disable = <0x40 0x40 0x70>; + }; + }; }; }; }; diff --git a/arch/arm/boot/dts/pxa910.dtsi b/arch/arm/boot/dts/pxa910.dtsi index 825aaca..20a3418 100644 --- a/arch/arm/boot/dts/pxa910.dtsi +++ b/arch/arm/boot/dts/pxa910.dtsi @@ -93,28 +93,37 @@ #address-cells = <1>; #size-cells = <1>; reg = <0xd4019000 0x1000>; - gpio-controller; - #gpio-cells = <2>; + marvell,gpio-ed-mask = <1>; + marvell,nr-gpios = <128>; interrupts = <49>; interrupt-names = "gpio_mux"; interrupt-controller; #interrupt-cells = <1>; + status = "disabled"; ranges; gcb0: gpio@d4019000 { reg = <0xd4019000 0x4>; + gpio-controller; + #gpio-cells = <2>; }; gcb1: gpio@d4019004 { reg = <0xd4019004 0x4>; + gpio-controller; + #gpio-cells = <2>; }; gcb2: gpio@d4019008 { reg = <0xd4019008 0x4>; + gpio-controller; + #gpio-cells = <2>; }; gcb3: gpio@d4019100 { reg = <0xd4019100 0x4>; + gpio-controller; + #gpio-cells = <2>; }; }; @@ -144,6 +153,22 @@ interrupt-names = "rtc 1Hz", "rtc alarm"; status = "disabled"; }; + + pmx: pinmux@d401e000 { + compatible = "pinconf-single"; + reg = <0xd401e000 0x330>; + #address-cells = <1>; + #size-cells = <1>; + #gpio-range-cells = <3>; + ranges; + + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <7>; + + range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; + }; }; }; };