From patchwork Mon Feb 11 17:10:52 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haojian Zhuang X-Patchwork-Id: 2125091 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 819B13FCA4 for ; Mon, 11 Feb 2013 17:14:59 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U4wvn-0001nJ-T4; Mon, 11 Feb 2013 17:12:39 +0000 Received: from mail-da0-f45.google.com ([209.85.210.45]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U4wur-0001Uz-Q1 for linux-arm-kernel@lists.infradead.org; Mon, 11 Feb 2013 17:11:43 +0000 Received: by mail-da0-f45.google.com with SMTP id w4so2805610dam.32 for ; Mon, 11 Feb 2013 09:11:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references:x-gm-message-state; bh=Z5qXWYUxX6xfaopMTvS7HEoMpYvW/WazCypf5jjjCUQ=; b=cXFQqV8+iipy/+wtRLm4g38TtjfVvstIaaxev/+eCbEt0cQeP8nEX6DUm3WKUKlzrb EcuF5swmqllyq1VJXbMGbwb1ZmkGEL3q0i5ecAdkEZB4/JOd2gcaTpjt/8bsKo8HjTBM mGlQkox77hmTNg/5ZrwVLGMWWggVvyIKvAIys/AUdHuR0jrT1RvThM75UvCujNFKKon+ 8nNpH6REzMX1gTK3USDIBflDREvmFnEDf/fQdqyTPUlcCjNDsnTFagDyFPINl89VaHYY qCaVkRm6V/JuuDhWfXMFr7m6U9j4WRSE7zVcvAdKiF0wxWbMJFjzwsiWar/FxICdNPQb MkLQ== X-Received: by 10.66.88.164 with SMTP id bh4mr42650553pab.41.1360602700343; Mon, 11 Feb 2013 09:11:40 -0800 (PST) Received: from localhost.localdomain ([27.115.121.35]) by mx.google.com with ESMTPS id m3sm67935973pav.4.2013.02.11.09.11.34 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 11 Feb 2013 09:11:39 -0800 (PST) From: Haojian Zhuang To: shiraz.hashim@st.com, shiraz.linux.kernel@gmail.com, linux@arm.linux.org.uk, tony@atomide.com, linux-arm-kernel@lists.infradead.org, swarren@nvidia.com, grant.likely@secretlab.ca, linus.walleij@linaro.org Subject: [PATCH v8 05/12] gpio: pl061: bind pinctrl by gpio request Date: Tue, 12 Feb 2013 01:10:52 +0800 Message-Id: <1360602659-4774-6-git-send-email-haojian.zhuang@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1360602659-4774-1-git-send-email-haojian.zhuang@linaro.org> References: <1360602659-4774-1-git-send-email-haojian.zhuang@linaro.org> X-Gm-Message-State: ALoCoQkGPU1CSNzDkLShDV4XzSuLE+pWzFIB9X86iURB0E394G6ShroDIbcdeUuFXHsL4X77SVQO X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130211_121142_089833_81212865 X-CRM114-Status: GOOD ( 13.03 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.45 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Haojian Zhuang , patches@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add the pl061_gpio_request() to request pinctrl. Create the logic between pl061 gpio driver and pinctrl (pinctrl-single) driver. While a gpio pin is requested, it will request pinctrl driver to set that pin with gpio function mode. So pinctrl driver should append .gpio_request_enable() in pinmux_ops. Signed-off-by: Haojian Zhuang --- drivers/gpio/gpio-pl061.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index 1a6d05c..bc9b4b2 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -61,6 +62,17 @@ struct pl061_gpio { #endif }; +static int pl061_gpio_request(struct gpio_chip *chip, unsigned offset) +{ + /* + * Map back to global GPIO space and request muxing, the direction + * parameter does not matter for this controller. + */ + int gpio = chip->base + offset; + + return pinctrl_request_gpio(gpio); +} + static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) { struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc); @@ -252,6 +264,7 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) spin_lock_init(&chip->lock); + chip->gc.request = pl061_gpio_request; chip->gc.direction_input = pl061_direction_input; chip->gc.direction_output = pl061_direction_output; chip->gc.get = pl061_get_value;