From patchwork Sat Feb 16 16:44:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 2152101 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id B6B8B3FD4F for ; Sat, 16 Feb 2013 16:50:34 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U6kvo-0003wC-HV; Sat, 16 Feb 2013 16:48:08 +0000 Received: from mail-ee0-f53.google.com ([74.125.83.53]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U6kt1-000207-9g for linux-arm-kernel@lists.infradead.org; Sat, 16 Feb 2013 16:45:20 +0000 Received: by mail-ee0-f53.google.com with SMTP id e53so2312288eek.40 for ; Sat, 16 Feb 2013 08:45:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=RrR6UICwPhZyf6sWCEJQzP2Q9a7NHgKRC/wir3Tbvrg=; b=TNHC+Rl1ZKPTF6fIVYCSeEJGGuoz1ih8gXtMldYLEU3WnyVrrJp2YscJ5lkdEOefyu WP2BvqHpBQgFyVEEv2Q2GlNoe+MHmVRqjL2xCk4Fd+o0euCueFlheqF3xdAmT5sJCPfT 32HNIo2FBjNxMMkrqq2zfhmG8m1b5pIjV7mPsK9n6RwQ8pRbYGW8rdhLmmUCYo2V5oXi 5CxGPQVRZ/CMx/uDH96wV4VcXJUqq+oEK0nnbmBGMDvvDtxGL59cFNJGy8FwIaMdGO4Y e5aruvyS/+JABLYOvRQlUn5AOtyQqqTbwbLHhc5gnZzouzVEof56CFF4Lfo0FzLaJhOJ WKHQ== X-Received: by 10.14.182.137 with SMTP id o9mr22363405eem.13.1361033114071; Sat, 16 Feb 2013 08:45:14 -0800 (PST) Received: from flatron.tomeq (87-207-52-162.dynamic.chello.pl. [87.207.52.162]) by mx.google.com with ESMTPS id f47sm43609113eep.13.2013.02.16.08.45.11 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 16 Feb 2013 08:45:13 -0800 (PST) From: Tomasz Figa To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 12/12] clocksource: samsung-time: Add Device Tree support Date: Sat, 16 Feb 2013 17:44:04 +0100 Message-Id: <1361033044-27629-13-git-send-email-tomasz.figa@gmail.com> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1361033044-27629-1-git-send-email-tomasz.figa@gmail.com> References: <1361033044-27629-1-git-send-email-tomasz.figa@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130216_114515_611996_A46EAD4B X-CRM114-Status: GOOD ( 18.06 ) X-Spam-Score: 0.3 (/) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (0.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.83.53 listed in list.dnswl.org] 3.0 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (tomasz.figa[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: ghcstop@gmail.com, Mark Rutland , Kukjin Kim , linux@arm.linux.org.uk, kwangwoo.lee@gmail.com, devicetree-discuss@lists.ozlabs.org, broonie@opensource.wolfsonmicro.com, mcuelenaere@gmail.com, Tomasz Figa , christer@weinigel.se, kyungmin.park@samsung.com, linux-samsung-soc@vger.kernel.org, buserror@gmail.com, augulis.darius@gmail.com, jacmet@sunsite.dk, Sylwester Nawrocki , linux@simtec.co.uk, jekhor@gmail.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds support for parsing all platform-specific data from Device Tree and instantiation using clocksource_of_init to samsung-time clocksource driver. Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: Tomasz Figa --- .../devicetree/bindings/arm/samsung-timer.txt | 33 ++++++ drivers/clocksource/samsung-time.c | 113 ++++++++++++++++++++- 2 files changed, 143 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/samsung-timer.txt diff --git a/Documentation/devicetree/bindings/arm/samsung-timer.txt b/Documentation/devicetree/bindings/arm/samsung-timer.txt new file mode 100644 index 0000000..179b7e4 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/samsung-timer.txt @@ -0,0 +1,33 @@ +* Samsung PWM timer + +Samsung SoCs contain PWM timer blocks which can be used for system clock source +and clock event timers. + +Be aware that this configuration is supported only on uniprocessor platforms. +For SMP SoCs, SMP-aware timers should be used, like MCT. + +Required properties: +- compatible : should be one of following: + samsung,s3c24xx-pwm-timer - for 16-bit timers present on S3C24xx + samsung,s3c64xx-pwm-timer - for 32-bit timers present on S3C64xx and newer +- reg: base address and size of register area +- interrupts: list of timer interrupts (one interrupt per timer, starting at + timer 0) + +Optional properties: +- samsung,source-timer: index of timer to be used as clocksource (defaults to 4) +- samsung,event-timer: index of timer to be used as clock event (defaults to 3) +- samsung,prescale-divisor: PWM prescaler divisor (from 1 to 256) +- samsung,divisor: PWM main divider divisor (1, 2, 4, 8 or 16) + +Example: + timer@7f006000 { + compatible = "samsung,s3c64xx-pwm-timer"; + reg = <0x7f006000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <23>, <24>, <25>, <27>, <28>; + samsung,source-timer = <4>; + samsung,event-timer = <3>; + samsung,prescale-divisor = <2>; + samsung,divisor = <1>; + }; diff --git a/drivers/clocksource/samsung-time.c b/drivers/clocksource/samsung-time.c index 4134811..76a15ca 100644 --- a/drivers/clocksource/samsung-time.c +++ b/drivers/clocksource/samsung-time.c @@ -14,6 +14,9 @@ #include #include #include +#include +#include +#include #include #include @@ -480,9 +483,12 @@ static void __init samsung_timer_resources(void) unsigned long source_id = timer_source.source_id; char devname[15]; - timer_base = ioremap_nocache(timer_variant.reg_base, SZ_4K); - if (!timer_base) - panic("failed to map timer registers"); + if (!timer_base) { + /* Compatibility fallback for non-DT platforms */ + timer_base = ioremap_nocache(timer_variant.reg_base, SZ_4K); + if (!timer_base) + panic("failed to map timer registers"); + } timerclk = clk_get(NULL, "timers"); if (IS_ERR(timerclk)) @@ -515,8 +521,102 @@ static void __init samsung_timer_resources(void) clk_enable(tin_source); } +enum { + TYPE_S3C24XX, + TYPE_S3C64XX, +}; + +#ifdef CONFIG_OF +static const struct of_device_id samsung_timer_ids[] = { + { .compatible = "samsung,s3c24xx-pwm-timer", + .data = (void *)TYPE_S3C24XX, }, + { .compatible = "samsung,s3c64xx-pwm-timer", + .data = (void *)TYPE_S3C64XX, }, + {}, +}; + +static void samsung_timer_parse_dt(struct device_node *np, + const struct of_device_id *match) +{ + int i; + u32 val; + + timer_base = of_iomap(np, 0); + if (!timer_base) + panic("failed to map timer registers"); + + for (i = 0; i < SAMSUNG_PWM_NUM; ++i) + timer_variant.irqs[i] = irq_of_parse_and_map(np, i); + + if (!timer_variant.irqs[timer_source.event_id]) + panic("no clock event irq provided"); + + switch ((unsigned int)match->data) { + case TYPE_S3C24XX: + timer_variant.bits = 16; + timer_variant.prescale = 25; + timer_variant.prescale = 50; + timer_variant.has_tint_cstat = false; + break; + case TYPE_S3C64XX: + timer_variant.bits = 32; + timer_variant.prescale = 2; + timer_variant.divisor = 2; + timer_variant.has_tint_cstat = true; + break; + } + + timer_source.source_id = 4; + if (!of_property_read_u32(np, "samsung,source-timer", &val)) { + if (val >= SAMSUNG_PWM_NUM) + panic("samsung,source-timer property out of range"); + timer_source.source_id = val; + } + + timer_source.event_id = 3; + if (!of_property_read_u32(np, "samsung,event-timer", &val)) { + if (val >= SAMSUNG_PWM_NUM) + panic("samsung,event-timer property out of range"); + timer_source.event_id = val; + } + + if (!of_property_read_u32(np, "samsung,prescale-divisor", &val)) { + if (val < 1 || val > 256) + panic("samsung,prescale-divisor property out of range"); + timer_variant.prescale = val; + } + + if (!of_property_read_u32(np, "samsung,divisor", &val)) { + switch (val) { + case 1: + case 2: + case 4: + case 8: + case 16: + timer_variant.divisor = timer_variant.prescale * val; + break; + default: + panic("invalid value of samsung,divisor property"); + } + } +} +#endif + void __init samsung_timer_init(void) { +#ifdef CONFIG_OF + struct device_node *np; + const struct of_device_id *match; + + if (of_have_populated_dt()) { + np = of_find_matching_node_and_match(NULL, + samsung_timer_ids, &match); + if (!np) + panic("timer node not found"); + + samsung_timer_parse_dt(np, match); + } +#endif if (!timer_source.source_id && !timer_source.event_id) panic("timer sources not set (see samsung_set_timer_source)!\n"); @@ -527,3 +627,10 @@ void __init samsung_timer_init(void) samsung_clockevent_init(); samsung_clocksource_init(); } + +#ifdef CONFIG_CLKSRC_OF +CLOCKSOURCE_OF_DECLARE(s3c24xx_timer, + "samsung,s3c24xx-pwm-timer", samsung_timer_init) +CLOCKSOURCE_OF_DECLARE(s3c64xx_timer, + "samsung,s3c64xx-pwm-timer", samsung_timer_init) +#endif