From patchwork Wed Feb 20 15:18:39 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 2167841 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id CD409DF230 for ; Wed, 20 Feb 2013 15:20:55 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1U8BQg-00050w-Bk; Wed, 20 Feb 2013 15:17:54 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1U8BQO-0004w8-Mh for linux-arm-kernel@lists.infradead.org; Wed, 20 Feb 2013 15:17:37 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id r1KFHWXg005486; Wed, 20 Feb 2013 09:17:33 -0600 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r1KFHTtd011157; Wed, 20 Feb 2013 20:47:32 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Wed, 20 Feb 2013 20:47:31 +0530 Received: from ula0393909.apr.dhcp.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r1KFHR96001869; Wed, 20 Feb 2013 20:47:30 +0530 From: Santosh Shilimkar To: Subject: [PATCH 1/9] ARM: OMAP4+: Use common scratchpad SAR RAM offsets for all architectures Date: Wed, 20 Feb 2013 20:48:39 +0530 Message-ID: <1361373527-21695-2-git-send-email-santosh.shilimkar@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1361373527-21695-1-git-send-email-santosh.shilimkar@ti.com> References: <1361373527-21695-1-git-send-email-santosh.shilimkar@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130220_101736_822334_BA88DF67 X-CRM114-Status: UNSURE ( 8.78 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.153 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: khilman@deeprootsystems.com, tony@atomide.com, Santosh Shilimkar , Tero Kristo , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Tero Kristo Simplifies code and also allows the re-use as is on OMAP5 devices. Signed-off-by: Tero Kristo Signed-off-by: Santosh Shilimkar --- arch/arm/mach-omap2/omap4-sar-layout.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h index e170fe8..6822d0a 100644 --- a/arch/arm/mach-omap2/omap4-sar-layout.h +++ b/arch/arm/mach-omap2/omap4-sar-layout.h @@ -20,13 +20,13 @@ #define SAR_BANK4_OFFSET 0x3000 /* Scratch pad memory offsets from SAR_BANK1 */ -#define SCU_OFFSET0 0xd00 -#define SCU_OFFSET1 0xd04 -#define OMAP_TYPE_OFFSET 0xd10 -#define L2X0_SAVE_OFFSET0 0xd14 -#define L2X0_SAVE_OFFSET1 0xd18 -#define L2X0_AUXCTRL_OFFSET 0xd1c -#define L2X0_PREFETCH_CTRL_OFFSET 0xd20 +#define SCU_OFFSET0 0xfe4 +#define SCU_OFFSET1 0xfe8 +#define OMAP_TYPE_OFFSET 0xfec +#define L2X0_SAVE_OFFSET0 0xff0 +#define L2X0_SAVE_OFFSET1 0xff4 +#define L2X0_AUXCTRL_OFFSET 0xff8 +#define L2X0_PREFETCH_CTRL_OFFSET 0xffc /* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */ #define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04