From patchwork Wed Feb 27 02:35:53 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huang Shijie X-Patchwork-Id: 2191921 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id DFEF4DF215 for ; Wed, 27 Feb 2013 02:39:57 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UAWtU-0003uB-2R; Wed, 27 Feb 2013 02:37:20 +0000 Received: from ch1ehsobe004.messaging.microsoft.com ([216.32.181.184] helo=ch1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UAWtC-0003qZ-JG for linux-arm-kernel@lists.infradead.org; Wed, 27 Feb 2013 02:37:03 +0000 Received: from mail36-ch1-R.bigfish.com (10.43.68.237) by CH1EHSOBE007.bigfish.com (10.43.70.57) with Microsoft SMTP Server id 14.1.225.23; Wed, 27 Feb 2013 02:37:02 +0000 Received: from mail36-ch1 (localhost [127.0.0.1]) by mail36-ch1-R.bigfish.com (Postfix) with ESMTP id F29363E02DE; Wed, 27 Feb 2013 02:37:01 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(zzzz1f42h1ee6h1de0h1202h1e76h1d1ah1d2ah1082kzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1155h) Received: from mail36-ch1 (localhost.localdomain [127.0.0.1]) by mail36-ch1 (MessageSwitch) id 136193262042638_3711; Wed, 27 Feb 2013 02:37:00 +0000 (UTC) Received: from CH1EHSMHS017.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.247]) by mail36-ch1.bigfish.com (Postfix) with ESMTP id F1A4B2A008F; Wed, 27 Feb 2013 02:36:59 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS017.bigfish.com (10.43.70.17) with Microsoft SMTP Server (TLS) id 14.1.225.23; Wed, 27 Feb 2013 02:36:59 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server (TLS) id 14.2.328.11; Wed, 27 Feb 2013 02:36:48 +0000 Received: from shlinux2.ap.freescale.net (shlinux2.ap.freescale.net [10.192.224.44]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r1R2ahfZ002681; Tue, 26 Feb 2013 19:36:53 -0700 From: Huang Shijie To: Subject: [PATCH 2/2] pinctrl: imx: use pin_func_ids to search the pinctrl item. Date: Wed, 27 Feb 2013 10:35:53 +0800 Message-ID: <1361932553-8218-2-git-send-email-b32955@freescale.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1361932553-8218-1-git-send-email-b32955@freescale.com> References: <1361932553-8218-1-git-send-email-b32955@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130226_213702_691044_635DBC17 X-CRM114-Status: GOOD ( 16.90 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.181.184 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: shawn.guo@linaro.org, linus.walleij@linaro.org, rob.herring@calxeda.com, Huang Shijie , dong.aisheng@linaro.org, devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The uart may works in DTE mode or DCE mode. The customer can sets the different modes by the pinctrl. But the pinctrl items for DTE or DCE may share the same Pad id, such as: MX6Q_PAD_EIM_D27__UART2_RXD_DTE and MX6Q_PAD_EIM_D27__WEIM_WEIM_D_27 share the same MX6Q_PAD_EIM_D27 pad id. The current code only search the pinctrl items by pad id. So if there two pinctrl items shares the same pad id, the current code only use the first one, even you tell the system to use the second one in the DTS file. This patch adds a new field pin_func_ids to imx_pin_group{}, and uses the pin_func_ids as the index to search the pinctrl items. In this way, we can avoid the issue. Signed-off-by: Huang Shijie --- drivers/pinctrl/pinctrl-imx.c | 30 ++++++++++++++++++++++-------- drivers/pinctrl/pinctrl-imx.h | 1 + 2 files changed, 23 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/pinctrl-imx.c b/drivers/pinctrl/pinctrl-imx.c index 4cebb9c..8c6abc0 100644 --- a/drivers/pinctrl/pinctrl-imx.c +++ b/drivers/pinctrl/pinctrl-imx.c @@ -56,11 +56,15 @@ struct imx_pinctrl { static const struct imx_pin_reg *imx_find_pin_reg( const struct imx_pinctrl_soc_info *info, - unsigned pin, bool is_mux, unsigned mux) + unsigned pin, bool is_mux, unsigned mux, + int pin_func_id) { const struct imx_pin_reg *pin_reg = NULL; int i; + if (pin_func_id > -1 && pin_func_id < info->npin_regs) + return info->pin_regs + pin_func_id; + for (i = 0; i < info->npin_regs; i++) { pin_reg = &info->pin_regs[i]; if (pin_reg->pid != pin) @@ -223,8 +227,10 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector, struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev); const struct imx_pinctrl_soc_info *info = ipctl->info; const struct imx_pin_reg *pin_reg; - const unsigned *pins, *mux; + const unsigned int *pins, *mux; + int *pin_func_ids; unsigned int npins, pin_id; + int pin_func_id; int i; /* @@ -234,6 +240,7 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector, pins = info->groups[group].pins; npins = info->groups[group].npins; mux = info->groups[group].mux_mode; + pin_func_ids = info->groups[group].pin_func_ids; WARN_ON(!pins || !npins || !mux); @@ -242,8 +249,10 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector, for (i = 0; i < npins; i++) { pin_id = pins[i]; + pin_func_id = pin_func_ids[i]; - pin_reg = imx_find_pin_reg(info, pin_id, 1, mux[i]); + pin_reg = imx_find_pin_reg(info, pin_id, 1, mux[i], + pin_func_id); if (!pin_reg) return -EINVAL; @@ -254,8 +263,9 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector, } writel(mux[i], ipctl->base + pin_reg->mux_reg); - dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n", - pin_reg->mux_reg, mux[i]); + dev_dbg(ipctl->dev, + "Pinid(%d), func-id(%d), write: offset 0x%x val 0x%x\n", + pin_id, pin_func_id, pin_reg->mux_reg, mux[i]); /* some pins also need select input setting, set it if found */ if (pin_reg->input_reg) { @@ -313,7 +323,7 @@ static int imx_pinconf_get(struct pinctrl_dev *pctldev, const struct imx_pinctrl_soc_info *info = ipctl->info; const struct imx_pin_reg *pin_reg; - pin_reg = imx_find_pin_reg(info, pin_id, 0, 0); + pin_reg = imx_find_pin_reg(info, pin_id, 0, 0, -1); if (!pin_reg) return -EINVAL; @@ -335,7 +345,7 @@ static int imx_pinconf_set(struct pinctrl_dev *pctldev, const struct imx_pinctrl_soc_info *info = ipctl->info; const struct imx_pin_reg *pin_reg; - pin_reg = imx_find_pin_reg(info, pin_id, 0, 0); + pin_reg = imx_find_pin_reg(info, pin_id, 0, 0, -1); if (!pin_reg) return -EINVAL; @@ -363,7 +373,7 @@ static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev, const struct imx_pin_reg *pin_reg; unsigned long config; - pin_reg = imx_find_pin_reg(info, pin_id, 0, 0); + pin_reg = imx_find_pin_reg(info, pin_id, 0, 0, -1); if (!pin_reg || !pin_reg->conf_reg) { seq_printf(s, "N/A"); return; @@ -460,6 +470,9 @@ static int imx_pinctrl_parse_groups(struct device_node *np, GFP_KERNEL); grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long), GFP_KERNEL); + grp->pin_func_ids = devm_kzalloc(info->dev, + grp->npins * sizeof(unsigned long), GFP_KERNEL); + for (i = 0, j = 0; i < size; i += 2, j++) { pin_func_id = be32_to_cpu(*list++); ret = imx_pinctrl_get_pin_id_and_mux(info, pin_func_id, @@ -473,6 +486,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np, if (config & IMX_PAD_SION) grp->mux_mode[j] |= IOMUXC_CONFIG_SION; grp->configs[j] = config & ~IMX_PAD_SION; + grp->pin_func_ids[j] = pin_func_id; } #ifdef DEBUG diff --git a/drivers/pinctrl/pinctrl-imx.h b/drivers/pinctrl/pinctrl-imx.h index 9b65e78..2c11b2f 100644 --- a/drivers/pinctrl/pinctrl-imx.h +++ b/drivers/pinctrl/pinctrl-imx.h @@ -35,6 +35,7 @@ struct imx_pin_group { unsigned npins; unsigned int *mux_mode; unsigned long *configs; + int *pin_func_ids; }; /**