From patchwork Tue Mar 5 03:56:41 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ian Campbell X-Patchwork-Id: 2217221 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 1F185DF24C for ; Tue, 5 Mar 2013 04:09:22 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UCj98-0001es-M3; Tue, 05 Mar 2013 04:06:34 +0000 Received: from smtp02.citrix.com ([66.165.176.63]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UCj2P-0004WN-R5 for linux-arm-kernel@lists.infradead.org; Tue, 05 Mar 2013 03:59:38 +0000 X-IronPort-AV: E=Sophos;i="4.84,784,1355097600"; d="scan'208";a="10566724" Received: from accessns.citrite.net (HELO FTLPEX01CL01.citrite.net) ([10.9.154.239]) by FTLPIPO02.CITRIX.COM with ESMTP/TLS/AES128-SHA; 05 Mar 2013 03:59:25 +0000 Received: from ukmail1.uk.xensource.com (10.80.16.128) by smtprelay.citrix.com (10.13.107.78) with Microsoft SMTP Server id 14.2.318.1; Mon, 4 Mar 2013 22:59:24 -0500 Received: from gateway-1.uk.xensource.com ([10.80.16.66] helo=[127.0.0.1]) by ukmail1.uk.xensource.com with esmtp (Exim 4.69) (envelope-from ) id 1UCj2B-0003EA-Dr; Tue, 05 Mar 2013 03:59:24 +0000 Message-ID: <1362455801.8941.24.camel@hastur.hellion.org.uk> Subject: Re: [PATCH LINUX v5] xen: event channel arrays are xen_ulong_t and not unsigned long From: Ian Campbell To: Rob Herring Date: Tue, 5 Mar 2013 03:56:41 +0000 In-Reply-To: <51340ACD.70904@gmail.com> References: <1361285327.1051.115.camel@zakaz.uk.xensource.com> <1361360886-2956-1-git-send-email-ian.campbell@citrix.com> <51340ACD.70904@gmail.com> X-Mailer: Evolution 3.4.4-2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130304_225938_056765_098C2C56 X-CRM114-Status: GOOD ( 16.22 ) X-Spam-Score: -3.2 (---) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-3.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [66.165.176.63 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.6 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: "Keir \(Xen.org\)" , Stefano Stabellini , Will Deacon , Nicolas Pitre , Konrad Rzeszutek Wilk , "Tim \(Xen.org\)" , "linux-kernel@vger.kernel.org" , "xen-devel@lists.xen.org" , Jan Beulich , "linux-arm-kernel@lists.infradead.org" X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org > > diff --git a/arch/arm/include/asm/xen/events.h b/arch/arm/include/asm/xen/events.h > > index 94b4e90..5c27696 100644 > > --- a/arch/arm/include/asm/xen/events.h > > +++ b/arch/arm/include/asm/xen/events.h > > @@ -15,4 +15,26 @@ static inline int xen_irqs_disabled(struct pt_regs *regs) > > return raw_irqs_disabled_flags(regs->ARM_cpsr); > > } > > > > +/* > > + * We cannot use xchg because it does not support 8-byte > > + * values. However it is safe to use {ldr,dtd}exd directly because all > > + * platforms which Xen can run on support those instructions. > > Why does atomic64_cmpxchg not work here? Just that we don't want/need the cmp aspect, we don't mind if an extra bit gets set as we read the value, so long as we atomically read and set to zero. > > + */ > > +static inline xen_ulong_t xchg_xen_ulong(xen_ulong_t *ptr, xen_ulong_t val) > > +{ > > + xen_ulong_t oldval; > > + unsigned int tmp; > > + > > + wmb(); > > Based on atomic64_cmpxchg implementation, you could use smp_mb here > which avoids an outer cache flush. Good point. > > + asm volatile("@ xchg_xen_ulong\n" > > + "1: ldrexd %0, %H0, [%3]\n" > > + " strexd %1, %2, %H2, [%3]\n" > > + " teq %1, #0\n" > > + " bne 1b" > > + : "=&r" (oldval), "=&r" (tmp) > > + : "r" (val), "r" (ptr) > > + : "memory", "cc"); > > And a smp_mb is needed here. I think for the specific caller which we have here it isn't strictly necessary, but for generic correctness I think you are right. Thanks for reviewing. Konrad, IIRC you have already picked this up (and sent to Linus?) so an incremental fix is required? See below. Ian. 8<------------------------------------ From 4ed928274dad4c3ed610e769b2ae11eb2d1ea433 Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Tue, 5 Mar 2013 03:37:23 +0000 Subject: [PATCH] arm: xen: correct barriers in xchg_xen_ulong We can use an smp_wmb rather than a wmb here and we also need one after the exchange. Spotted by Rob Herring. Signed-off-by: Ian Campbell --- arch/arm/include/asm/xen/events.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/xen/events.h b/arch/arm/include/asm/xen/events.h index 5c27696..0e1f59e 100644 --- a/arch/arm/include/asm/xen/events.h +++ b/arch/arm/include/asm/xen/events.h @@ -25,7 +25,7 @@ static inline xen_ulong_t xchg_xen_ulong(xen_ulong_t *ptr, xen_ulong_t val) xen_ulong_t oldval; unsigned int tmp; - wmb(); + smp_wmb(); asm volatile("@ xchg_xen_ulong\n" "1: ldrexd %0, %H0, [%3]\n" " strexd %1, %2, %H2, [%3]\n" @@ -34,6 +34,7 @@ static inline xen_ulong_t xchg_xen_ulong(xen_ulong_t *ptr, xen_ulong_t val) : "=&r" (oldval), "=&r" (tmp) : "r" (val), "r" (ptr) : "memory", "cc"); + smp_wmb(); return oldval; }