From patchwork Mon Mar 11 12:37:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: dahuang@nvidia.com X-Patchwork-Id: 2248641 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id B7AA73FCF6 for ; Mon, 11 Mar 2013 12:41:04 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UF1zI-0006jl-LT; Mon, 11 Mar 2013 12:37:56 +0000 Received: from hqemgate03.nvidia.com ([216.228.121.140]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UF1zE-0006jJ-Tc for linux-arm-kernel@lists.infradead.org; Mon, 11 Mar 2013 12:37:54 +0000 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Mon, 11 Mar 2013 05:42:48 -0700 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp07.nvidia.com (PGP Universal service); Mon, 11 Mar 2013 05:37:37 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Mon, 11 Mar 2013 05:37:37 -0700 Received: from dahuang-vm.nvidia.com (172.20.144.16) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server (TLS) id 8.3.298.1; Mon, 11 Mar 2013 05:37:35 -0700 From: Danny Huang To: , , , , , , , Subject: [PATCH] arm: tegra: fuse: export chip id and revision Date: Mon, 11 Mar 2013 20:37:21 +0800 Message-ID: <1363005441-26329-1-git-send-email-dahuang@nvidia.com> X-Mailer: git-send-email 1.8.1.5 X-NVConfidentiality: public MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130311_083753_173149_970528FD X-CRM114-Status: UNSURE ( 9.45 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -9.3 (---------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-9.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [216.228.121.140 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -2.4 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Expose tegra chip id and revision in /proc/cpu/chipinfo for user mode usage. Signed-off-by: Danny Huang --- arch/arm/mach-tegra/fuse.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c index f7db078..7895542 100644 --- a/arch/arm/mach-tegra/fuse.c +++ b/arch/arm/mach-tegra/fuse.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include "fuse.h" @@ -43,6 +44,7 @@ enum tegra_revision tegra_revision; static int tegra_fuse_spare_bit; static void (*tegra_init_speedo_data)(void); +static struct proc_dir_entry *proc_entry; /* The BCT to use at boot is specified by board straps that can be read * through a APB misc register and decoded. 2 bits, i.e. 4 possible BCTs. @@ -161,3 +163,20 @@ unsigned long long tegra_chip_uid(void) return (hi << 32ull) | lo; } EXPORT_SYMBOL(tegra_chip_uid); + +static int show_chip_info(char *page, char **start, off_t offset, + int count, int *eof, void *data) +{ + return snprintf(page, count, "tegra_chip_id: %d\ntegra_chip_rev: %d\n", + tegra_chip_id, tegra_revision); +} + +static int __init tegra_chip_info(void) +{ + proc_entry = create_proc_entry("cpu/chipinfo", S_IRUGO, NULL); + if (proc_entry) + proc_entry->read_proc = show_chip_info; + return 0; +} + +late_initcall(tegra_chip_info);