From patchwork Mon Mar 11 14:12:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Genoud X-Patchwork-Id: 2248991 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id C6E6BDF5B1 for ; Mon, 11 Mar 2013 14:18:00 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UF3Te-0004zc-8X; Mon, 11 Mar 2013 14:13:22 +0000 Received: from mail-wg0-f46.google.com ([74.125.82.46]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UF3TO-0004xC-Kq for linux-arm-kernel@lists.infradead.org; Mon, 11 Mar 2013 14:13:07 +0000 Received: by mail-wg0-f46.google.com with SMTP id fg15so4859367wgb.25 for ; Mon, 11 Mar 2013 07:13:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=1QeanBCZ+Op9fjsumm5g+91wotZ7HIcoHGAjqtYRIpM=; b=yw5cX1ulbj7CSfa4O7iY2sI0T/Wlc/7ptN1gN5Wa6wWy1kMca2S2zz6tVG86WhagwK G58U2uoWmof5qPUhci1x8hzZRRWDtA3wc+8dM0AkVoNWr/74gVm0klePvjoHV+qsjmhA EPgHw4HKdZnksuZzl/sNv8FXvYntJWYdfv1v/iYbBjN1+qLTO0HVvfAW2TwWpmyGhpdx c7A4AoxDPmg9Ccocw9iOSilK6EeUBviy10/tWsuwmK6mybhm/xyJmnb9xkxIaZi5Virg BceY8m7HVT6hrra0jFyZNeJT6/HMqTmHdnC0eJYC2v3tzmwjkQh3Finvi10fvN0Ae2DU usqw== X-Received: by 10.180.98.232 with SMTP id el8mr12881576wib.22.1363011184395; Mon, 11 Mar 2013 07:13:04 -0700 (PDT) Received: from localhost.localdomain (lyon.paratronic.fr. [213.41.177.106]) by mx.google.com with ESMTPS id bs6sm17454277wib.4.2013.03.11.07.13.02 (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 11 Mar 2013 07:13:03 -0700 (PDT) From: Richard Genoud To: Nicolas Ferre Subject: [PATCH 2/2] arm: at91: dt: at91sam9x5: complete NAND pinctrl Date: Mon, 11 Mar 2013 15:12:40 +0100 Message-Id: <1363011160-11297-2-git-send-email-richard.genoud@gmail.com> X-Mailer: git-send-email 1.7.2.5 In-Reply-To: <1363011160-11297-1-git-send-email-richard.genoud@gmail.com> References: <1363011160-11297-1-git-send-email-richard.genoud@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130311_101306_932047_1D31FEE7 X-CRM114-Status: GOOD ( 10.39 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.46 listed in list.dnswl.org] 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (richard.genoud[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Richard Genoud , Jean-Christophe PLAGNIOL-VILLARD , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org There was only chip enable and readdy/busy pins for the nand controller. This add the rest of the pins. pinctrl_nand_16bits contains the specific muxes for 16 bits NANDs. Signed-off-by: Richard Genoud --- based on 3.9-rc2 arch/arm/boot/dts/at91sam9x5.dtsi | 28 ++++++++++++++++++++++++++-- 1 files changed, 26 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index 9b5d048..a98c0d5 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -238,8 +238,32 @@ nand { pinctrl_nand: nand-0 { atmel,pins = - <3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */ - 3 5 0x0 0x1>; /* PD5 gpio RDY/BUSY pin pull_up */ + <3 0 0x1 0x0 /* PD0 periph A Read Enable */ + 3 1 0x1 0x0 /* PD1 periph A Write Enable */ + 3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */ + 3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */ + 3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */ + 3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */ + 3 6 0x1 0x0 /* PD6 periph A Data bit 0 */ + 3 7 0x1 0x0 /* PD7 periph A Data bit 1 */ + 3 8 0x1 0x0 /* PD8 periph A Data bit 2 */ + 3 9 0x1 0x0 /* PD9 periph A Data bit 3 */ + 3 10 0x1 0x0 /* PD10 periph A Data bit 4 */ + 3 11 0x1 0x0 /* PD11 periph A Data bit 5 */ + 3 12 0x1 0x0 /* PD12 periph A Data bit 6 */ + 3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */ + }; + + pinctrl_nand_16bits: nand_16bits-0 { + atmel,pins = + <3 14 0x1 0x0 /* PD14 periph A Data bit 8 */ + 3 15 0x1 0x0 /* PD15 periph A Data bit 9 */ + 3 16 0x1 0x0 /* PD16 periph A Data bit 10 */ + 3 17 0x1 0x0 /* PD17 periph A Data bit 11 */ + 3 18 0x1 0x0 /* PD18 periph A Data bit 12 */ + 3 19 0x1 0x0 /* PD19 periph A Data bit 13 */ + 3 20 0x1 0x0 /* PD20 periph A Data bit 14 */ + 3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */ }; };