From patchwork Tue Mar 12 16:46:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 2257261 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 1B17A3FCF6 for ; Tue, 12 Mar 2013 16:52:32 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UFSNl-0004XG-2u; Tue, 12 Mar 2013 16:48:57 +0000 Received: from moutng.kundenserver.de ([212.227.17.8]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UFSLl-00040o-Nc for linux-arm-kernel@lists.infradead.org; Tue, 12 Mar 2013 16:47:07 +0000 Received: from wuerfel.lan (HSI-KBW-46-223-90-92.hsi.kabel-badenwuerttemberg.de [46.223.90.92]) by mrelayeu.kundenserver.de (node=mrbap4) with ESMTP (Nemesis) id 0Mb9Nj-1UTwvZ1Mzr-00KMAB; Tue, 12 Mar 2013 17:46:50 +0100 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 06/13] ARM: spear: move spear.h and misc_regs.h into plat-spear Date: Tue, 12 Mar 2013 17:46:49 +0100 Message-Id: <1363106816-9603-7-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1363106816-9603-1-git-send-email-arnd@arndb.de> References: <1363106816-9603-1-git-send-email-arnd@arndb.de> X-Provags-ID: V02:K0:pzoN7pCisKXWSD4IKFLm7R/0un8JGdo7Iban2bS/WTs Dj9KlK73x/qn8F0jfFNV5nYeVGBgEBCH8HPnvPtIezQjIKjk+f FsbjbFstAtwtd5qNTsHhH/6ysaEr9gFK4fm1fDfOj3yOqlMfsH 3OHUEH87oe5o6EXYxuFYa6vK2HkWiLN/lgXelwaz7efo/rEYGj FJeyVja17zxl/ZVav5N+HROveaBzNqiobro/WTtGEHUuy1X5ti AV5cbWpxnkpw26B4tnLYyRu8A1NDfAtj9MJGjTzd0iHMO9txlL go0LDdHzyD8pI67Se5UYdtcl/IkIS0LIvoMsvkyWPrW1q2Qh8d p1/wMQQQvOp8JP4qp/P+yX6VzPbS/kk7Zgu92WqYU X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130312_124654_133238_B65D77D0 X-CRM114-Status: GOOD ( 13.46 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.227.17.8 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: vipulkumar.samar@st.com, spear-devel@list.st.com, Arnd Bergmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The spear13xx version of spear.h is completely different from the newly combined spear3xx/spear6xx version, but we can never build ARMv5 and ARMv7 platforms together, so there is no harm in putting all the contents into a single file and adding appropriate ifdefs. Signed-off-by: Arnd Bergmann Acked-by: Viresh Kumar --- arch/arm/mach-spear13xx/include/mach/spear.h | 54 ------------- arch/arm/mach-spear3xx/include/mach/misc_regs.h | 22 ------ arch/arm/mach-spear3xx/include/mach/spear.h | 59 -------------- arch/arm/mach-spear6xx/include/mach/misc_regs.h | 22 ------ arch/arm/mach-spear6xx/include/mach/spear.h | 59 -------------- arch/arm/plat-spear/include/mach/misc_regs.h | 22 ++++++ arch/arm/plat-spear/include/mach/spear.h | 101 ++++++++++++++++++++++++ 7 files changed, 123 insertions(+), 216 deletions(-) delete mode 100644 arch/arm/mach-spear13xx/include/mach/spear.h delete mode 100644 arch/arm/mach-spear3xx/include/mach/misc_regs.h delete mode 100644 arch/arm/mach-spear3xx/include/mach/spear.h delete mode 100644 arch/arm/mach-spear6xx/include/mach/misc_regs.h delete mode 100644 arch/arm/mach-spear6xx/include/mach/spear.h create mode 100644 arch/arm/plat-spear/include/mach/misc_regs.h create mode 100644 arch/arm/plat-spear/include/mach/spear.h diff --git a/arch/arm/mach-spear13xx/include/mach/spear.h b/arch/arm/mach-spear13xx/include/mach/spear.h deleted file mode 100644 index 7cfa681..0000000 --- a/arch/arm/mach-spear13xx/include/mach/spear.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * arch/arm/mach-spear13xx/include/mach/spear.h - * - * spear13xx Machine family specific definition - * - * Copyright (C) 2012 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_SPEAR13XX_H -#define __MACH_SPEAR13XX_H - -#include - -#define PERIP_GRP2_BASE UL(0xB3000000) -#define VA_PERIP_GRP2_BASE IOMEM(0xFE000000) -#define MCIF_SDHCI_BASE UL(0xB3000000) -#define SYSRAM0_BASE UL(0xB3800000) -#define VA_SYSRAM0_BASE IOMEM(0xFE800000) -#define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) - -#define PERIP_GRP1_BASE UL(0xE0000000) -#define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) -#define UART_BASE UL(0xE0000000) -#define VA_UART_BASE IOMEM(0xFD000000) -#define SSP_BASE UL(0xE0100000) -#define MISC_BASE UL(0xE0700000) -#define VA_MISC_BASE IOMEM(0xFD700000) - -#define A9SM_AND_MPMC_BASE UL(0xEC000000) -#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) - -/* A9SM peripheral offsets */ -#define A9SM_PERIP_BASE UL(0xEC800000) -#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) -#define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) - -#define L2CC_BASE UL(0xED000000) -#define VA_L2CC_BASE IOMEM(UL(0xFB000000)) - -/* others */ -#define DMAC0_BASE UL(0xEA800000) -#define DMAC1_BASE UL(0xEB000000) -#define MCIF_CF_BASE UL(0xB2800000) - -/* Debug uart for linux, will be used for debug and uncompress messages */ -#define SPEAR_DBG_UART_BASE UART_BASE -#define VA_SPEAR_DBG_UART_BASE VA_UART_BASE - -#endif /* __MACH_SPEAR13XX_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h deleted file mode 100644 index 075812c..0000000 --- a/arch/arm/mach-spear3xx/include/mach/misc_regs.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/misc_regs.h - * - * Miscellaneous registers definitions for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_MISC_REGS_H -#define __MACH_MISC_REGS_H - -#include - -#define MISC_BASE IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE) -#define DMA_CHN_CFG (MISC_BASE + 0x0A0) - -#endif /* __MACH_MISC_REGS_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h deleted file mode 100644 index ee5a774..0000000 --- a/arch/arm/mach-spear3xx/include/mach/spear.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * SPEAr3xx/6xx Machine family specific definition - * - * Copyright (C) 2009,2012 ST Microelectronics - * Rajeev Kumar - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_SPEAR_H -#define __MACH_SPEAR_H - -#include - -/* ICM1 - Low speed connection */ -#define SPEAR_ICM1_2_BASE UL(0xD0000000) -#define VA_SPEAR_ICM1_2_BASE UL(0xFD000000) -#define SPEAR_ICM1_UART_BASE UL(0xD0000000) -#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE) -#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) - -/* ML-1, 2 - Multi Layer CPU Subsystem */ -#define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) -#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) - -/* ICM3 - Basic Subsystem */ -#define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) -#define VA_SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) -#define SPEAR_ICM3_DMA_BASE UL(0xFC400000) -#define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) -#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE) -#define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) -#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE) - -/* Debug uart for linux, will be used for debug and uncompress messages */ -#define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE -#define VA_SPEAR_DBG_UART_BASE VA_SPEAR_ICM1_UART_BASE - -/* Sysctl base for spear platform */ -#define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE -#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE - -/* SPEAr320 Macros */ -#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) -#define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000) -#define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE) -#define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018) - #define SPEAR320_UARTX_PCLK_MASK 0x1 - #define SPEAR320_UART2_PCLK_SHIFT 8 - #define SPEAR320_UART3_PCLK_SHIFT 9 - #define SPEAR320_UART4_PCLK_SHIFT 10 - #define SPEAR320_UART5_PCLK_SHIFT 11 - #define SPEAR320_UART6_PCLK_SHIFT 12 - #define SPEAR320_RS485_PCLK_SHIFT 13 - -#endif /* __MACH_SPEAR_H */ diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h deleted file mode 100644 index 28aa508..0000000 --- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * arch/arm/mach-spear6xx/include/mach/misc_regs.h - * - * Miscellaneous registers definitions for SPEAr6xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_MISC_REGS_H -#define __MACH_MISC_REGS_H - -#include - -#define MISC_BASE IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE) -#define DMA_CHN_CFG (MISC_BASE + 0x0A0) - -#endif /* __MACH_MISC_REGS_H */ diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h deleted file mode 100644 index ee5a774..0000000 --- a/arch/arm/mach-spear6xx/include/mach/spear.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * SPEAr3xx/6xx Machine family specific definition - * - * Copyright (C) 2009,2012 ST Microelectronics - * Rajeev Kumar - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_SPEAR_H -#define __MACH_SPEAR_H - -#include - -/* ICM1 - Low speed connection */ -#define SPEAR_ICM1_2_BASE UL(0xD0000000) -#define VA_SPEAR_ICM1_2_BASE UL(0xFD000000) -#define SPEAR_ICM1_UART_BASE UL(0xD0000000) -#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE) -#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) - -/* ML-1, 2 - Multi Layer CPU Subsystem */ -#define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) -#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) - -/* ICM3 - Basic Subsystem */ -#define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) -#define VA_SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) -#define SPEAR_ICM3_DMA_BASE UL(0xFC400000) -#define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) -#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE) -#define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) -#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE) - -/* Debug uart for linux, will be used for debug and uncompress messages */ -#define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE -#define VA_SPEAR_DBG_UART_BASE VA_SPEAR_ICM1_UART_BASE - -/* Sysctl base for spear platform */ -#define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE -#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE - -/* SPEAr320 Macros */ -#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) -#define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000) -#define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE) -#define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018) - #define SPEAR320_UARTX_PCLK_MASK 0x1 - #define SPEAR320_UART2_PCLK_SHIFT 8 - #define SPEAR320_UART3_PCLK_SHIFT 9 - #define SPEAR320_UART4_PCLK_SHIFT 10 - #define SPEAR320_UART5_PCLK_SHIFT 11 - #define SPEAR320_UART6_PCLK_SHIFT 12 - #define SPEAR320_RS485_PCLK_SHIFT 13 - -#endif /* __MACH_SPEAR_H */ diff --git a/arch/arm/plat-spear/include/mach/misc_regs.h b/arch/arm/plat-spear/include/mach/misc_regs.h new file mode 100644 index 0000000..075812c --- /dev/null +++ b/arch/arm/plat-spear/include/mach/misc_regs.h @@ -0,0 +1,22 @@ +/* + * arch/arm/mach-spear3xx/include/mach/misc_regs.h + * + * Miscellaneous registers definitions for SPEAr3xx machine family + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __MACH_MISC_REGS_H +#define __MACH_MISC_REGS_H + +#include + +#define MISC_BASE IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE) +#define DMA_CHN_CFG (MISC_BASE + 0x0A0) + +#endif /* __MACH_MISC_REGS_H */ diff --git a/arch/arm/plat-spear/include/mach/spear.h b/arch/arm/plat-spear/include/mach/spear.h new file mode 100644 index 0000000..2198ab9 --- /dev/null +++ b/arch/arm/plat-spear/include/mach/spear.h @@ -0,0 +1,101 @@ +/* + * SPEAr3xx/6xx Machine family specific definition + * + * Copyright (C) 2009,2012 ST Microelectronics + * Rajeev Kumar + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __MACH_SPEAR_H +#define __MACH_SPEAR_H + +#include + +#if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX) + +/* ICM1 - Low speed connection */ +#define SPEAR_ICM1_2_BASE UL(0xD0000000) +#define VA_SPEAR_ICM1_2_BASE UL(0xFD000000) +#define SPEAR_ICM1_UART_BASE UL(0xD0000000) +#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE) +#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) + +/* ML-1, 2 - Multi Layer CPU Subsystem */ +#define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) +#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) + +/* ICM3 - Basic Subsystem */ +#define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) +#define VA_SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) +#define SPEAR_ICM3_DMA_BASE UL(0xFC400000) +#define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) +#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE) +#define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) +#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE) + +/* Debug uart for linux, will be used for debug and uncompress messages */ +#define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE +#define VA_SPEAR_DBG_UART_BASE VA_SPEAR_ICM1_UART_BASE + +/* Sysctl base for spear platform */ +#define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE +#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE + +/* SPEAr320 Macros */ +#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) +#define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000) +#define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE) +#define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018) + #define SPEAR320_UARTX_PCLK_MASK 0x1 + #define SPEAR320_UART2_PCLK_SHIFT 8 + #define SPEAR320_UART3_PCLK_SHIFT 9 + #define SPEAR320_UART4_PCLK_SHIFT 10 + #define SPEAR320_UART5_PCLK_SHIFT 11 + #define SPEAR320_UART6_PCLK_SHIFT 12 + #define SPEAR320_RS485_PCLK_SHIFT 13 +#endif /* SPEAR3xx || SPEAR6XX */ + +#ifdef CONFIG_ARCH_SPEAR13XX + +#define PERIP_GRP2_BASE UL(0xB3000000) +#define VA_PERIP_GRP2_BASE IOMEM(0xFE000000) +#define MCIF_SDHCI_BASE UL(0xB3000000) +#define SYSRAM0_BASE UL(0xB3800000) +#define VA_SYSRAM0_BASE IOMEM(0xFE800000) +#define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) + +#define PERIP_GRP1_BASE UL(0xE0000000) +#define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) +#define UART_BASE UL(0xE0000000) +#define VA_UART_BASE IOMEM(0xFD000000) +#define SSP_BASE UL(0xE0100000) +#define MISC_BASE UL(0xE0700000) +#define VA_MISC_BASE IOMEM(0xFD700000) + +#define A9SM_AND_MPMC_BASE UL(0xEC000000) +#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) + +/* A9SM peripheral offsets */ +#define A9SM_PERIP_BASE UL(0xEC800000) +#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) +#define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) + +#define L2CC_BASE UL(0xED000000) +#define VA_L2CC_BASE IOMEM(UL(0xFB000000)) + +/* others */ +#define DMAC0_BASE UL(0xEA800000) +#define DMAC1_BASE UL(0xEB000000) +#define MCIF_CF_BASE UL(0xB2800000) + +/* Debug uart for linux, will be used for debug and uncompress messages */ +#define SPEAR_DBG_UART_BASE UART_BASE +#define VA_SPEAR_DBG_UART_BASE VA_UART_BASE + +#endif /* SPEAR13XX */ + +#endif /* __MACH_SPEAR_H */