From patchwork Wed Mar 20 11:41:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 2307021 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id B5680DF24C for ; Wed, 20 Mar 2013 11:46:31 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UIHQY-0005Ve-Am; Wed, 20 Mar 2013 11:43:30 +0000 Received: from moutng.kundenserver.de ([212.227.126.187]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UIHOg-00051X-RI for linux-arm-kernel@lists.infradead.org; Wed, 20 Mar 2013 11:41:40 +0000 Received: from wuerfel.lan (HSI-KBW-46-223-90-92.hsi.kabel-badenwuerttemberg.de [46.223.90.92]) by mrelayeu.kundenserver.de (node=mreu1) with ESMTP (Nemesis) id 0Lvx1t-1UldBH3HO1-017Y9V; Wed, 20 Mar 2013 12:41:23 +0100 From: Arnd Bergmann To: Barry Song Subject: [PATCH 4/8] ARM: sirf: enable sparse IRQ Date: Wed, 20 Mar 2013 12:41:15 +0100 Message-Id: <1363779679-16880-5-git-send-email-arnd@arndb.de> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1363779679-16880-1-git-send-email-arnd@arndb.de> References: <1363779679-16880-1-git-send-email-arnd@arndb.de> X-Provags-ID: V02:K0:pgv2B1Ju0UTCbqotomaP2q7ukDISxHwrH7CCY1Od5Eg Ha95F+v5AjpEulFYeeKO0jLL4A/OuvmcJsVqb3CVpCMkN3QPO0 ptrfLQFR6bqPvzKuUo0uL4CM89faugMULeFNegrhj8uTR21uIs 7qF6QPpZ1+IK7ItDWpbWTGDipdWyGWWLEithqXRVdvwC3Lsyo1 D3/Ux6IJGh73p4G+MWvrrPOouC1uQY8HPkdabDDkfAVOcfVfY3 l/eQCO2uelzE1C0BbHuWJemjN1da+4Y6oXeEDRqwbfjm6KX1bx 4n4YhwbJ9pO1orM5YSM/OkwX6xGqwF7XCAhOwIS16MukS5sGzF Xs28EA6PovwVwHGsPg50gZp9IlqbROHLuXTCMCMjA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130320_074135_341958_93E635E2 X-CRM114-Status: UNSURE ( 9.42 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [212.227.126.187 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: olof@lixom.net, Arnd Bergmann , workgroup.linux@csr.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Now that both irqchips for sirf are converted to not rely on legacy domains, let's move all of the platform over to sparse IRQ. Signed-off-by: Arnd Bergmann --- arch/arm/Kconfig | 1 + arch/arm/mach-prima2/include/mach/irqs.h | 17 ----------------- 2 files changed, 1 insertion(+), 17 deletions(-) delete mode 100644 arch/arm/mach-prima2/include/mach/irqs.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5bfd584..c674b32 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -427,6 +427,7 @@ config ARCH_SIRF select PINCTRL select PINCTRL_SIRF select USE_OF + select SPARSE_IRQ help Support for CSR SiRFprimaII/Marco/Polo platforms diff --git a/arch/arm/mach-prima2/include/mach/irqs.h b/arch/arm/mach-prima2/include/mach/irqs.h deleted file mode 100644 index b778a0f..0000000 --- a/arch/arm/mach-prima2/include/mach/irqs.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-prima2/include/mach/irqs.h - * - * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. - * - * Licensed under GPLv2 or later. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#define SIRFSOC_INTENAL_IRQ_START 0 -#define SIRFSOC_INTENAL_IRQ_END 127 -#define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1) -#define NR_IRQS 288 - -#endif