From patchwork Thu Mar 21 13:48:25 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 2313561 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 39C60DF264 for ; Thu, 21 Mar 2013 13:52:21 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UIfrW-00074q-RG; Thu, 21 Mar 2013 13:48:58 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UIfr7-0006zs-Dt for linux-arm-kernel@lists.infradead.org; Thu, 21 Mar 2013 13:48:36 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r2LDmT7l028699; Thu, 21 Mar 2013 08:48:29 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2LDmTKS002623; Thu, 21 Mar 2013 08:48:29 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.2.342.3; Thu, 21 Mar 2013 08:48:28 -0500 Received: from localhost.localdomain (h112-211.vpn.ti.com [172.24.112.211]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2LDmQqc001190; Thu, 21 Mar 2013 08:48:27 -0500 From: Roger Quadros To: Subject: [PATCH] ARM: OMAP4: clock: Initialize USB DPLL Date: Thu, 21 Mar 2013 15:48:25 +0200 Message-ID: <1363873705-3224-1-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.7.4.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130321_094833_742426_E01A5E57 X-CRM114-Status: GOOD ( 12.67 ) X-Spam-Score: -9.4 (---------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-9.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -2.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: rnayak@ti.com, linux-kernel@vger.kernel.org, balbi@ti.com, t-kristo@ti.com, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Roger Quadros X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org If the bootloader doesn't configure USB DPLL (e.g. in u-boot, disable CONFIG_USB_EHCI_OMAP), then we get all sorts of problems like - division by zero errors at boot [1] - USB DPLL fails to enter locked state - USB EHCI Host is non functional - Device can't enter OFF mode Initializing the USB DPLL fixes all these issues. [1] [ 0.000000] clock: dpll_usb_ck failed transition to 'locked' [ 0.000000] Division by zero in kernel. [ 0.000000] [] (unwind_backtrace+0x0/0xf0) from [] (Ldiv0+0x8/0x10) [ 0.000000] [] (Ldiv0+0x8/0x10) from [] (clk_divider_set_rate+0x10/0x124) [ 0.000000] [] (clk_divider_set_rate+0x10/0x124) from [] (clk_change_rate+0x3c/0xb4) [ 0.000000] [] (clk_change_rate+0x3c/0xb4) from [] (clk_change_rate+0xa0/0xb4) Signed-off-by: Roger Quadros --- arch/arm/mach-omap2/cclock44xx_data.c | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/cclock44xx_data.c b/arch/arm/mach-omap2/cclock44xx_data.c index bfc46c1..6127bb9 100644 --- a/arch/arm/mach-omap2/cclock44xx_data.c +++ b/arch/arm/mach-omap2/cclock44xx_data.c @@ -53,6 +53,12 @@ */ #define OMAP4_DPLL_ABE_DEFFREQ 98304000 +/* + * OMAP4450 TRM Rev X, section "3.6.3.9.5 DPLL_USB Preferred Settings" + * states it must be at 960MHz + */ +#define OMAP4_DPLL_USB_DEFFREQ 960000000 + /* Root clocks */ DEFINE_CLK_FIXED_RATE(extalt_clkin_ck, CLK_IS_ROOT, 59000000, 0x0); @@ -1729,6 +1735,19 @@ int __init omap4xxx_clk_init(void) omap2_clk_disable_autoidle_all(); /* + * Lock USB_DPLL to avoid issues with USB host and OFF mode + */ + rc = clk_set_rate(&dpll_usb_ck, OMAP4_DPLL_USB_DEFFREQ); + if (rc) { + pr_err("%s: failed to configure DPLL_USB: %d\n", __func__, rc); + } else { + rc = clk_set_rate(&dpll_usb_m2_ck, OMAP4_DPLL_USB_DEFFREQ/2); + if (rc) + pr_err("%s: failed to configure DPLL_USB_M2: %d\n", + __func__, rc); + } + + /* * On OMAP4460 the ABE DPLL fails to turn on if in idle low-power * state when turning the ABE clock domain. Workaround this by * locking the ABE DPLL on boot.