From patchwork Fri Mar 22 13:24:13 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ludovic Desroches X-Patchwork-Id: 2319931 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 805BC3FD8C for ; Fri, 22 Mar 2013 13:31:13 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UJ20d-0001iE-AK; Fri, 22 Mar 2013 13:27:51 +0000 Received: from eusmtp01.atmel.com ([212.144.249.243]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UJ1yu-00017g-Gn for linux-arm-kernel@lists.infradead.org; Fri, 22 Mar 2013 13:26:12 +0000 Received: from ibiza.corp.atmel.com (10.161.101.13) by eusmtp01.atmel.com (10.161.101.31) with Microsoft SMTP Server id 14.2.318.4; Fri, 22 Mar 2013 14:25:06 +0100 From: To: Subject: [PATCH 5/6] ARM: at91: dt: add device tree files for SAMA5D3 family Date: Fri, 22 Mar 2013 14:24:13 +0100 Message-ID: <1363958654-7713-6-git-send-email-ludovic.desroches@atmel.com> X-Mailer: git-send-email 1.7.11.3 In-Reply-To: <1363958654-7713-1-git-send-email-ludovic.desroches@atmel.com> References: <1363958654-7713-1-git-send-email-ludovic.desroches@atmel.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130322_092604_853785_6837C5C9 X-CRM114-Status: UNSURE ( 9.35 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -4.4 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -2.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: marc.zyngier@arm.com, plagnioj@jcrosoft.com, Ludovic Desroches , nicolas.ferre@atmel.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Ludovic Desroches Add device tree files for the SAMA5D3 family (SAMA5D31, SAMA5D33, SAMA5D34 and SAMA5D35). Signed-off-by: Ludovic Desroches --- arch/arm/boot/dts/Makefile | 5 + arch/arm/boot/dts/sama5d3.dtsi | 1031 +++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/sama5d31ek.dts | 51 ++ arch/arm/boot/dts/sama5d33ek.dts | 44 ++ arch/arm/boot/dts/sama5d34ek.dts | 61 +++ arch/arm/boot/dts/sama5d35ek.dts | 56 ++ arch/arm/boot/dts/sama5d3xcm.dtsi | 91 ++++ arch/arm/boot/dts/sama5d3xdm.dtsi | 42 ++ arch/arm/boot/dts/sama5d3xmb.dtsi | 166 ++++++ 9 files changed, 1547 insertions(+) create mode 100644 arch/arm/boot/dts/sama5d3.dtsi create mode 100644 arch/arm/boot/dts/sama5d31ek.dts create mode 100644 arch/arm/boot/dts/sama5d33ek.dts create mode 100644 arch/arm/boot/dts/sama5d34ek.dts create mode 100644 arch/arm/boot/dts/sama5d35ek.dts create mode 100644 arch/arm/boot/dts/sama5d3xcm.dtsi create mode 100644 arch/arm/boot/dts/sama5d3xdm.dtsi create mode 100644 arch/arm/boot/dts/sama5d3xmb.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9c62558..234e78f 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -31,6 +31,11 @@ dtb-$(CONFIG_ARCH_AT91) += at91sam9g25ek.dtb dtb-$(CONFIG_ARCH_AT91) += at91sam9g35ek.dtb dtb-$(CONFIG_ARCH_AT91) += at91sam9x25ek.dtb dtb-$(CONFIG_ARCH_AT91) += at91sam9x35ek.dtb +# sama5d3 +dtb-$(CONFIG_ARCH_AT91) += sama5d31ek.dtb +dtb-$(CONFIG_ARCH_AT91) += sama5d33ek.dtb +dtb-$(CONFIG_ARCH_AT91) += sama5d34ek.dtb +dtb-$(CONFIG_ARCH_AT91) += sama5d35ek.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb dtb-$(CONFIG_ARCH_BCM) += bcm11351-brt.dtb diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi new file mode 100644 index 0000000..39b0458 --- /dev/null +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -0,0 +1,1031 @@ +/* + * sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC + * applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35 SoC + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches + * + * Licensed under GPLv2 or later. + */ + +/include/ "skeleton.dtsi" + +/ { + model = "Atmel SAMA5D3 family SoC"; + compatible = "atmel,sama5d3", "atmel,sama5"; + interrupt-parent = <&aic>; + + aliases { + serial0 = &dbgu; + serial1 = &usart0; + serial2 = &usart1; + serial3 = &usart2; + serial4 = &usart3; + gpio0 = &pioA; + gpio1 = &pioB; + gpio2 = &pioC; + gpio3 = &pioD; + gpio4 = &pioE; + tcb0 = &tcb0; + tcb1 = &tcb1; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + ssc0 = &ssc0; + ssc1 = &ssc1; + }; + cpus { + cpu@0 { + compatible = "arm,cortex-a5"; + }; + }; + + memory { + reg = <0x20000000 0x8000000>; + }; + + ahb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + apb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mmc0: mmc@f0000000 { + compatible = "atmel,hsmci"; + reg = <0xf0000000 0x600>; + interrupts = <21 4 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_dat4_7>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi0: spi@f0004000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91sam9x5-spi"; + reg = <0xf0004000 0x100>; + interrupts = <24 4 3>; + cs-gpios = <&pioD 13 0 + &pioD 14 0 /* conflicts with SCK0 and CANRX0 */ + &pioD 15 0 /* conflicts with CTS0 and CANTX0 */ + &pioD 16 0 /* conflicts with RTS0 and PWMFI3 */ + >; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0>; + status = "disabled"; + }; + + ssc0: ssc@f0008000 { + compatible = "atmel,at91sam9g45-ssc"; + reg = <0xf0008000 0x4000>; + interrupts = <38 4 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; + status = "disabled"; + }; + + can0: can@f000c000 { + compatible = "atmel,at91sam9x5-can"; + reg = <0xf000c000 0x300>; + interrupts = <40 4 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_rx_tx>; + status = "disabled"; + }; + + tcb0: timer@f0010000 { + compatible = "atmel,at91sam9x5-tcb"; + reg = <0xf0010000 0x100>; + interrupts = <26 4 0>; + }; + + i2c0: i2c@f0014000 { + compatible = "atmel,at91sam9x5-i2c"; + reg = <0xf0014000 0x4000>; + interrupts = <18 4 6>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c@f0018000 { + compatible = "atmel,at91sam9x5-i2c"; + reg = <0xf0018000 0x4000>; + interrupts = <19 4 6>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + usart0: serial@f001c000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf001c000 0x100>; + interrupts = <12 4 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart0>; + status = "disabled"; + }; + + usart1: serial@f0020000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf0020000 0x100>; + interrupts = <13 4 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart1>; + status = "disabled"; + }; + + macb0: ethernet@f0028000 { + compatible = "cnds,pc302-gem", "cdns,gem"; + reg = <0xf0028000 0x100>; + interrupts = <34 4 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>; + status = "disabled"; + }; + + isi: isi@f0034000 { + compatible = "atmel,at91sam9g45-isi"; + reg = <0xf0034000 0x4000>; + interrupts = <37 4 5>; + status = "disabled"; + }; + + mmc1: mmc@f8000000 { + compatible = "atmel,hsmci"; + reg = <0xf8000000 0x600>; + interrupts = <22 4 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc2: mmc@f8004000 { + compatible = "atmel,hsmci"; + reg = <0xf8004000 0x600>; + interrupts = <23 4 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc2_clk_cmd_dat0 &pinctrl_mmc2_dat1_3>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi@f8008000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91sam9x5-spi"; + reg = <0xf8008000 0x100>; + interrupts = <25 4 3>; + cs-gpios = <&pioC 25 0 + &pioC 26 0 /* conflitcs with TWD1 and ISI_D11 */ + &pioC 27 0 /* conflitcs with TWCK1 and ISI_D10 */ + &pioC 28 0 /* conflitcs with PWMFI0 and ISI_D9 */ + >; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1>; + status = "disabled"; + }; + + ssc1: ssc@f800c000 { + compatible = "atmel,at91sam9g45-ssc"; + reg = <0xf800c000 0x4000>; + interrupts = <39 4 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; + status = "disabled"; + }; + + can1: can@f8010000 { + compatible = "atmel,at91sam9x5-can"; + reg = <0xf8010000 0x300>; + interrupts = <41 4 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_rx_tx>; + }; + + tcb1: timer@f8014000 { + compatible = "atmel,at91sam9x5-tcb"; + reg = <0xf8014000 0x100>; + interrupts = <27 4 0>; + }; + + adc0: adc@f8018000 { + compatible = "atmel,at91sam9260-adc"; + reg = <0xf8018000 0x100>; + interrupts = <29 4 5>; + pinctrl-names = "default"; + pinctrl-0 = < + &pinctrl_adc0_adtrg + &pinctrl_adc0_ad0 + &pinctrl_adc0_ad1 + &pinctrl_adc0_ad2 + &pinctrl_adc0_ad3 + &pinctrl_adc0_ad4 + &pinctrl_adc0_ad5 + &pinctrl_adc0_ad6 + &pinctrl_adc0_ad7 + &pinctrl_adc0_ad8 + &pinctrl_adc0_ad9 + &pinctrl_adc0_ad10 + &pinctrl_adc0_ad11 + >; + atmel,adc-channel-base = <0x50>; + atmel,adc-channels-used = <0xfff>; + atmel,adc-drdy-mask = <0x1000000>; + atmel,adc-num-channels = <12>; + atmel,adc-startup-time = <40>; + atmel,adc-status-register = <0x30>; + atmel,adc-trigger-register = <0xc0>; + atmel,adc-use-external; + atmel,adc-vref = <3000>; + atmel,adc-res = <10 12>; + atmel,adc-res-names = "lowres", "highres"; + status = "disabled"; + + trigger@0 { + trigger-name = "external-rising"; + trigger-value = <0x1>; + trigger-external; + }; + trigger@1 { + trigger-name = "external-falling"; + trigger-value = <0x2>; + trigger-external; + }; + trigger@2 { + trigger-name = "external-any"; + trigger-value = <0x3>; + trigger-external; + }; + trigger@3 { + trigger-name = "continuous"; + trigger-value = <0x6>; + }; + }; + + tsadcc: tsadcc@f8018000 { + compatible = "atmel,at91sam9x5-tsadcc"; + reg = <0xf8018000 0x4000>; + interrupts = <29 4 5>; + atmel,tsadcc_clock = <300000>; + atmel,filtering_average = <0x03>; + atmel,pendet_debounce = <0x08>; + atmel,pendet_sensitivity = <0x02>; + atmel,ts_sample_hold_time = <0x0a>; + status = "disabled"; + }; + + i2c2: i2c@f801c000 { + compatible = "atmel,at91sam9x5-i2c"; + reg = <0xf801c000 0x4000>; + interrupts = <20 4 6>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + usart2: serial@f8020000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8020000 0x100>; + interrupts = <14 4 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart2>; + status = "disabled"; + }; + + usart3: serial@f8024000 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xf8024000 0x100>; + interrupts = <15 4 5>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart3>; + status = "disabled"; + }; + + macb1: ethernet@f802c000 { + compatible = "cdns,at32ap7000-macb", "cdns,macb"; + reg = <0xf802c000 0x100>; + interrupts = <35 4 3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb1_rmii>; + status = "disabled"; + }; + + sha@f8034000 { + compatible = "atmel,sam9g46-sha"; + reg = <0xf8034000 0x100>; + interrupts = <42 4 0>; + }; + + aes@f8038000 { + compatible = "atmel,sam9g46-aes"; + reg = <0xf8038000 0x100>; + interrupts = <43 4 0>; + }; + + tdes@f803c000 { + compatible = "atmel,sam9g46-tdes"; + reg = <0xf803c000 0x100>; + interrupts = <44 4 0>; + }; + + dma0: dma-controller@ffffe600 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffe600 0x200>; + interrupts = <30 4 0>; + #dma-cells = <1>; + }; + + dma1: dma-controller@ffffe800 { + compatible = "atmel,at91sam9g45-dma"; + reg = <0xffffe800 0x200>; + interrupts = <31 4 0>; + #dma-cells = <1>; + }; + + ramc0: ramc@ffffea00 { + compatible = "atmel,at91sam9g45-ddramc"; + reg = <0xffffea00 0x200>; + }; + + dbgu: serial@ffffee00 { + compatible = "atmel,at91sam9260-usart"; + reg = <0xffffee00 0x200>; + interrupts = <2 4 7>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dbgu>; + status = "disabled"; + }; + + aic: interrupt-controller@fffff000 { + #interrupt-cells = <3>; + compatible = "atmel,sama5d3-aic"; + interrupt-controller; + reg = <0xfffff000 0x200>; + atmel,external-irqs = <47>; + }; + + pinctrl@fffff200 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus"; + ranges = <0xfffff200 0xfffff200 0xa00>; + atmel,mux-mask = < + /* A B C */ + 0xffffffff 0xc0fc0000 0xc0ff0000 /* pioA */ + 0xffffffff 0x0ff8ffff 0x00000000 /* pioB */ + 0xffffffff 0xbc00f1ff 0x7c00fc00 /* pioC */ + 0xffffffff 0xc001c0e0 0x0001c1e0 /* pioD */ + 0xffffffff 0xbf9f8000 0x18000000 /* pioE */ + >; + + /* shared pinctrl settings */ + adc0 { + pinctrl_adc0_adtrg: adc0_adtrg { + atmel,pins = + <3 19 0x1 0x0>; /* PD19 periph A ADTRG */ + }; + pinctrl_adc0_ad0: adc0_ad0 { + atmel,pins = + <3 20 0x1 0x0>; /* PD20 periph A AD0 */ + }; + pinctrl_adc0_ad1: adc0_ad1 { + atmel,pins = + <3 21 0x1 0x0>; /* PD21 periph A AD1 */ + }; + pinctrl_adc0_ad2: adc0_ad2 { + atmel,pins = + <3 22 0x1 0x0>; /* PD22 periph A AD2 */ + }; + pinctrl_adc0_ad3: adc0_ad3 { + atmel,pins = + <3 23 0x1 0x0>; /* PD23 periph A AD3 */ + }; + pinctrl_adc0_ad4: adc0_ad4 { + atmel,pins = + <3 24 0x1 0x0>; /* PD24 periph A AD4 */ + }; + pinctrl_adc0_ad5: adc0_ad5 { + atmel,pins = + <3 25 0x1 0x0>; /* PD25 periph A AD5 */ + }; + pinctrl_adc0_ad6: adc0_ad6 { + atmel,pins = + <3 26 0x1 0x0>; /* PD26 periph A AD6 */ + }; + pinctrl_adc0_ad7: adc0_ad7 { + atmel,pins = + <3 27 0x1 0x0>; /* PD27 periph A AD7 */ + }; + pinctrl_adc0_ad8: adc0_ad8 { + atmel,pins = + <3 28 0x1 0x0>; /* PD28 periph A AD8 */ + }; + pinctrl_adc0_ad9: adc0_ad9 { + atmel,pins = + <3 29 0x1 0x0>; /* PD29 periph A AD9 */ + }; + pinctrl_adc0_ad10: adc0_ad10 { + atmel,pins = + <3 30 0x1 0x0>; /* PD30 periph A AD10, conflicts with PCK0 */ + }; + pinctrl_adc0_ad11: adc0_ad11 { + atmel,pins = + <3 31 0x1 0x0>; /* PD31 periph A AD11, conflicts with PCK1 */ + }; + }; + + can0 { + pinctrl_can0_rx_tx: can0_rx_tx { + atmel,pins = + <3 14 0x3 0x0 /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */ + 3 15 0x3 0x0>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */ + }; + }; + + can1 { + pinctrl_can1_rx_tx: can1_rx_tx { + atmel,pins = + <1 14 0x2 0x0 /* PB14 periph B RX, conflicts with GCRS */ + 1 15 0x2 0x0>; /* PB15 periph B TX, conflicts with GCOL */ + }; + }; + + dbgu { + pinctrl_dbgu: dbgu-0 { + atmel,pins = + <1 30 0x1 0x0 /* PB30 periph A */ + 1 31 0x1 0x1>; /* PB31 periph A with pullup */ + }; + }; + + i2c0 { + pinctrl_i2c0: i2c0-0 { + atmel,pins = + <0 30 0x1 0x0 /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ + 0 31 0x1 0x0>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ + }; + }; + + i2c1 { + pinctrl_i2c1: i2c1-0 { + atmel,pins = + <2 26 0x2 0x0 /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ + 2 27 0x2 0x0>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ + }; + }; + + isi { + pinctrl_isi: isi-0 { + atmel,pins = + <0 16 0x3 0x0 /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */ + 0 17 0x3 0x0 /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */ + 0 18 0x3 0x0 /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */ + 0 19 0x3 0x0 /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */ + 0 20 0x3 0x0 /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */ + 0 21 0x3 0x0 /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */ + 0 22 0x3 0x0 /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */ + 0 23 0x3 0x0 /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */ + 2 30 0x3 0x0 /* PC30 periph C ISI_PCK, conflicts with UTXD0 */ + 0 31 0x3 0x0 /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */ + 0 30 0x3 0x0 /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */ + 2 29 0x3 0x0 /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */ + 2 28 0x3 0x0>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */ + }; + pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 { + atmel,pins = + <3 31 0x2 0x0>; /* PD31 periph B ISI_MCK */ + }; + }; + + lcd { + pinctrl_lcd: lcd-0 { + atmel,pins = + <0 24 0x1 0x0 /* PA24 periph A LCDPWM */ + 0 26 0x1 0x0 /* PA26 periph A LCDVSYNC */ + 0 27 0x1 0x0 /* PA27 periph A LCDHSYNC */ + 0 25 0x1 0x0 /* PA25 periph A LCDDISP */ + 0 29 0x1 0x0 /* PA29 periph A LCDDEN */ + 0 28 0x1 0x0 /* PA28 periph A LCDPCK */ + 0 0 0x1 0x0 /* PA0 periph A LCDD0 pin */ + 0 1 0x1 0x0 /* PA1 periph A LCDD1 pin */ + 0 2 0x1 0x0 /* PA2 periph A LCDD2 pin */ + 0 3 0x1 0x0 /* PA3 periph A LCDD3 pin */ + 0 4 0x1 0x0 /* PA4 periph A LCDD4 pin */ + 0 5 0x1 0x0 /* PA5 periph A LCDD5 pin */ + 0 6 0x1 0x0 /* PA6 periph A LCDD6 pin */ + 0 7 0x1 0x0 /* PA7 periph A LCDD7 pin */ + 0 8 0x1 0x0 /* PA8 periph A LCDD8 pin */ + 0 9 0x1 0x0 /* PA9 periph A LCDD9 pin */ + 0 10 0x1 0x0 /* PA10 periph A LCDD10 pin */ + 0 11 0x1 0x0 /* PA11 periph A LCDD11 pin */ + 0 12 0x1 0x0 /* PA12 periph A LCDD12 pin */ + 0 13 0x1 0x0 /* PA13 periph A LCDD13 pin */ + 0 14 0x1 0x0 /* PA14 periph A LCDD14 pin */ + 0 15 0x1 0x0 /* PA15 periph A LCDD15 pin */ + 2 14 0x3 0x0 /* PC14 periph C LCDD16 pin */ + 2 13 0x3 0x0 /* PC13 periph C LCDD17 pin */ + 2 12 0x3 0x0 /* PC12 periph C LCDD18 pin */ + 2 11 0x3 0x0 /* PC11 periph C LCDD19 pin */ + 2 10 0x3 0x0 /* PC10 periph C LCDD20 pin */ + 2 15 0x3 0x0 /* PC15 periph C LCDD21 pin */ + 4 27 0x3 0x0 /* PE27 periph C LCDD22 pin */ + 4 28 0x3 0x0>; /* PE28 periph C LCDD23 pin */ + }; + }; + + macb0 { + pinctrl_macb0_data_rgmii: macb0_data_rgmii { + atmel,pins = + <1 0 0x1 0x0 /* PB0 periph A GTX0, conflicts with PWMH0 */ + 1 1 0x1 0x0 /* PB1 periph A GTX1, conflicts with PWML0 */ + 1 2 0x1 0x0 /* PB2 periph A GTX2, conflicts with TK1 */ + 1 3 0x1 0x0 /* PB3 periph A GTX3, conflicts with TF1 */ + 1 4 0x1 0x0 /* PB4 periph A GRX0, conflicts with PWMH1 */ + 1 5 0x1 0x0 /* PB5 periph A GRX1, conflicts with PWML1 */ + 1 6 0x1 0x0 /* PB6 periph A GRX2, conflicts with TD1 */ + 1 7 0x1 0x0>; /* PB7 periph A GRX3, conflicts with RK1 */ + }; + pinctrl_macb0_data_gmii: macb0_data_gmii { + atmel,pins = + <1 19 0x2 0x0 /* PB19 periph B GTX4, conflicts with MCI1_CDA */ + 1 20 0x2 0x0 /* PB20 periph B GTX5, conflicts with MCI1_DA0 */ + 1 21 0x2 0x0 /* PB21 periph B GTX6, conflicts with MCI1_DA1 */ + 1 22 0x2 0x0 /* PB22 periph B GTX7, conflicts with MCI1_DA2 */ + 1 23 0x2 0x0 /* PB23 periph B GRX4, conflicts with MCI1_DA3 */ + 1 24 0x2 0x0 /* PB24 periph B GRX5, conflicts with MCI1_CK */ + 1 25 0x2 0x0 /* PB25 periph B GRX6, conflicts with SCK1 */ + 1 26 0x2 0x0>; /* PB26 periph B GRX7, conflicts with CTS1 */ + }; + pinctrl_macb0_signal_rgmii: macb0_signal_rgmii { + atmel,pins = + <1 8 0x1 0x0 /* PB8 periph A GTXCK, conflicts with PWMH2 */ + 1 9 0x1 0x0 /* PB9 periph A GTXEN, conflicts with PWML2 */ + 1 11 0x1 0x0 /* PB11 periph A GRXCK, conflicts with RD1 */ + 1 13 0x1 0x0 /* PB13 periph A GRXER, conflicts with PWML3 */ + 1 16 0x1 0x0 /* PB16 periph A GMDC */ + 1 17 0x1 0x0 /* PB17 periph A GMDIO */ + 1 18 0x1 0x0>; /* PB18 periph A G125CK */ + }; + pinctrl_macb0_signal_gmii: macb0_signal_gmii { + atmel,pins = + <1 9 0x1 0x0 /* PB9 periph A GTXEN, conflicts with PWML2 */ + 1 10 0x1 0x0 /* PB10 periph A GTXER, conflicts with RF1 */ + 1 11 0x1 0x0 /* PB11 periph A GRXCK, conflicts with RD1 */ + 1 12 0x1 0x0 /* PB12 periph A GRXDV, conflicts with PWMH3 */ + 1 13 0x1 0x0 /* PB13 periph A GRXER, conflicts with PWML3 */ + 1 14 0x1 0x0 /* PB14 periph A GCRS, conflicts with CANRX1 */ + 1 15 0x1 0x0 /* PB15 periph A GCOL, conflicts with CANTX1 */ + 1 16 0x1 0x0 /* PB16 periph A GMDC */ + 1 17 0x1 0x0 /* PB17 periph A GMDIO */ + 1 27 0x2 0x0>; /* PB27 periph B G125CKO */ + }; + + }; + + macb1 { + pinctrl_macb1_rmii: macb1_rmii-0 { + atmel,pins = + <2 0 0x1 0x0 /* PC0 periph A ETX0, conflicts with TIOA3 */ + 2 1 0x1 0x0 /* PC1 periph A ETX1, conflicts with TIOB3 */ + 2 2 0x1 0x0 /* PC2 periph A ERX0, conflicts with TCLK3 */ + 2 3 0x1 0x0 /* PC3 periph A ERX1, conflicts with TIOA4 */ + 2 4 0x1 0x0 /* PC4 periph A ETXEN, conflicts with TIOB4 */ + 2 5 0x1 0x0 /* PC5 periph A ECRSDV,conflicts with TCLK4 */ + 2 6 0x1 0x0 /* PC6 periph A ERXER, conflicts with TIOA5 */ + 2 7 0x1 0x0 /* PC7 periph A EREFCK, conflicts with TIOB5 */ + 2 8 0x1 0x0 /* PC8 periph A EMDC, conflicts with TCLK5 */ + 2 9 0x1 0x0>; /* PC9 periph A EMDIO */ + }; + }; + + mmc0 { + pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 { + atmel,pins = + <3 9 0x1 0x0 /* PD9 periph A MCI0_CK */ + 3 0 0x1 0x1 /* PD0 periph A MCI0_CDA with pullup */ + 3 1 0x1 0x1>; /* PD1 periph A MCI0_DA0 with pullup */ + }; + pinctrl_mmc0_dat1_3: mmc0_dat1_3 { + atmel,pins = + <3 2 0x1 0x1 /* PD2 periph A MCI0_DA1 with pullup */ + 3 3 0x1 0x1 /* PD3 periph A MCI0_DA2 with pullup */ + 3 4 0x1 0x1>; /* PD4 periph A MCI0_DA3 with pullup */ + }; + pinctrl_mmc0_dat4_7: mmc0_dat4_7 { + atmel,pins = + <3 5 0x1 0x1 /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */ + 3 6 0x1 0x1 /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */ + 3 7 0x1 0x1 /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */ + 3 8 0x1 0x1>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */ + }; + }; + + mmc1 { + pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 { + atmel,pins = + <1 24 0x1 0x0 /* PB24 periph A MCI1_CK, conflicts with GRX5 */ + 1 19 0x1 0x1 /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */ + 1 20 0x1 0x1>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */ + }; + pinctrl_mmc1_dat1_3: mmc1_dat1_3 { + atmel,pins = + <1 21 0x1 0x1 /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */ + 1 22 0x1 0x1 /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */ + 1 23 0x1 0x1>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */ + }; + }; + + mmc2 { + pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 { + atmel,pins = + <2 15 0x1 0x0 /* PC15 periph A MCI2_CK, conflicts with PCK2 */ + 2 10 0x1 0x1 /* PC10 periph A MCI2_CDA with pullup */ + 2 11 0x1 0x1>; /* PC11 periph A MCI2_DA0 with pullup */ + }; + pinctrl_mmc2_dat1_3: mmc2_dat1_3 { + atmel,pins = + <2 12 0x1 0x0 /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */ + 2 13 0x1 0x0 /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */ + 2 14 0x1 0x0>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */ + }; + }; + + nand0 { + pinctrl_nand0_ale_cle: nand0_ale_cle-0 { + atmel,pins = + <4 21 0x1 0x1 /* PE21 periph A with pullup */ + 4 22 0x1 0x1>; /* PE22 periph A with pullup */ + }; + }; + + pioA: gpio@fffff200 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff200 0x100>; + interrupts = <6 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pioB: gpio@fffff400 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x100>; + interrupts = <7 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pioC: gpio@fffff600 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x100>; + interrupts = <8 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pioD: gpio@fffff800 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff800 0x100>; + interrupts = <9 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pioE: gpio@fffffa00 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffffa00 0x100>; + interrupts = <10 4 1>; + #gpio-cells = <2>; + gpio-controller; + interrupt-controller; + #interrupt-cells = <2>; + }; + + spi0 { + pinctrl_spi0: spi0-0 { + atmel,pins = + <3 10 0x1 0x0 /* PD10 periph A SPI0_MISO pin */ + 3 11 0x1 0x0 /* PD11 periph A SPI0_MOSI pin */ + 3 12 0x1 0x0 /* PD12 periph A SPI0_SPCK pin */ + 3 13 0x0 0x0>; /* PD13 GPIO SPI0_NPCS0 pin */ + }; + }; + + spi1 { + pinctrl_spi1: spi1-0 { + atmel,pins = + <2 22 0x1 0x0 /* PC22 periph A SPI1_MISO pin */ + 2 23 0x1 0x0 /* PC23 periph A SPI1_MOSI pin */ + 2 24 0x1 0x0 /* PC24 periph A SPI1_SPCK pin */ + 2 25 0x0 0x0>; /* PC25 GPIO SPI1_NPCS0 pin */ + }; + }; + + ssc0 { + pinctrl_ssc0_tx: ssc0_tx { + atmel,pins = + <2 16 0x1 0x0 /* PC16 periph A TK0 */ + 2 17 0x1 0x0 /* PC17 periph A TF0 */ + 2 18 0x1 0x0>; /* PC18 periph A TD0 */ + }; + + pinctrl_ssc0_rx: ssc0_rx { + atmel,pins = + <2 19 0x1 0x0 /* PC19 periph A RK0 */ + 2 20 0x1 0x0 /* PC20 periph A RF0 */ + 2 21 0x1 0x0>; /* PC21 periph A RD0 */ + }; + }; + + ssc1 { + pinctrl_ssc1_tx: ssc1_tx { + atmel,pins = + <1 2 0x2 0x0 /* PB2 periph B TK1, conflicts with GTX2 */ + 1 3 0x2 0x0 /* PB3 periph B TF1, conflicts with GTX3 */ + 1 6 0x2 0x0>; /* PB6 periph B TD1, conflicts with TD1 */ + }; + + pinctrl_ssc1_rx: ssc1_rx { + atmel,pins = + <1 7 0x2 0x0 /* PB7 periph B RK1, conflicts with EREFCK */ + 1 10 0x2 0x0 /* PB10 periph B RF1, conflicts with GTXER */ + 1 11 0x2 0x0>; /* PB11 periph B RD1, conflicts with GRXCK */ + }; + }; + + uart0 { + pinctrl_uart0: uart0-0 { + atmel,pins = + <2 29 0x1 0x0 /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */ + 2 30 0x1 0x1>; /* PC30 periph A with pullup, conflicts with ISI_PCK */ + }; + }; + + uart1 { + pinctrl_uart1: uart1-0 { + atmel,pins = + <0 30 0x2 0x0 /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */ + 0 31 0x2 0x1>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */ + }; + }; + + usart0 { + pinctrl_usart0: usart0-0 { + atmel,pins = + <3 17 0x1 0x0 /* PD17 periph A */ + 3 18 0x1 0x1>; /* PD18 periph A with pullup */ + }; + + pinctrl_usart0_rts_cts: usart0_rts_cts-0 { + atmel,pins = + <3 15 0x1 0x0 /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */ + 3 16 0x1 0x0>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */ + }; + }; + + usart1 { + pinctrl_usart1: usart1-0 { + atmel,pins = + <1 28 0x1 0x0 /* PB28 periph A */ + 1 29 0x1 0x1>; /* PB29 periph A with pullup */ + }; + + pinctrl_usart1_rts_cts: usart1_rts_cts-0 { + atmel,pins = + <1 26 0x1 0x0 /* PB26 periph A, conflicts with GRX7 */ + 1 27 0x1 0x0>; /* PB27 periph A, conflicts with G125CKO */ + }; + }; + + usart2 { + pinctrl_usart2: usart2-0 { + atmel,pins = + <4 25 0x2 0x0 /* PE25 periph B, conflicts with A25 */ + 4 26 0x2 0x1>; /* PE26 periph B with pullup, conflicts NCS0 */ + }; + + pinctrl_usart2_rts_cts: usart2_rts_cts-0 { + atmel,pins = + <4 23 0x2 0x0 /* PE23 periph B, conflicts with A23 */ + 4 24 0x2 0x0>; /* PE24 periph B, conflicts with A24 */ + }; + }; + + usart3 { + pinctrl_usart3: usart3-0 { + atmel,pins = + <4 18 0x2 0x0 /* PE18 periph B, conflicts with A18 */ + 4 19 0x2 0x1>; /* PE19 periph B with pullup, conflicts with A19 */ + }; + + pinctrl_usart3_rts_cts: usart3_rts_cts-0 { + atmel,pins = + <4 16 0x2 0x0 /* PE16 periph B, conflicts with A16 */ + 4 17 0x2 0x0>; /* PE17 periph B, conflicts with A17 */ + }; + }; + }; + + pmc: pmc@fffffc00 { + compatible = "atmel,at91rm9200-pmc"; + reg = <0xfffffc00 0x120>; + }; + + rstc@fffffe00 { + compatible = "atmel,at91sam9g45-rstc"; + reg = <0xfffffe00 0x10>; + }; + + pit: timer@fffffe30 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffe30 0xf>; + interrupts = <3 4 5>; + }; + + watchdog@fffffe40 { + compatible = "atmel,at91sam9260-wdt"; + reg = <0xfffffe40 0x10>; + status = "disabled"; + }; + + rtc@fffffeb0 { + compatible = "atmel,at91rm9200-rtc"; + reg = <0xfffffeb0 0x30>; + interrupts = <1 4 7>; + }; + }; + + usb0: gadget@00500000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "atmel,at91sam9rl-udc"; + reg = <0x00500000 0x100000 + 0xf8030000 0x4000>; + interrupts = <33 4 2>; + status = "disabled"; + + ep0 { + reg = <0>; + atmel,fifo-size = <64>; + atmel,nb-banks = <1>; + }; + + ep1 { + reg = <1>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep2 { + reg = <2>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <3>; + atmel,can-dma; + atmel,can-isoc; + }; + + ep3 { + reg = <3>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + }; + + ep4 { + reg = <4>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + }; + + ep5 { + reg = <5>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + }; + + ep6 { + reg = <6>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + }; + + ep7 { + reg = <7>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + atmel,can-dma; + }; + + ep8 { + reg = <8>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + }; + + ep9 { + reg = <9>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + }; + + ep10 { + reg = <10>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + }; + + ep11 { + reg = <11>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + }; + + ep12 { + reg = <12>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + }; + + ep13 { + reg = <13>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + }; + + ep14 { + reg = <14>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + }; + + ep15 { + reg = <15>; + atmel,fifo-size = <1024>; + atmel,nb-banks = <2>; + }; + }; + + usb1: ohci@00600000 { + compatible = "atmel,at91rm9200-ohci", "usb-ohci"; + reg = <0x00600000 0x100000>; + interrupts = <32 4 2>; + status = "disabled"; + }; + + usb2: ehci@00700000 { + compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; + reg = <0x00700000 0x100000>; + interrupts = <32 4 2>; + status = "disabled"; + }; + + nand0: nand@60000000 { + compatible = "atmel,at91rm9200-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = < 0x60000000 0x01000000 /* EBI CS3 */ + 0xffffc070 0x00000490 /* SMC PMECC regs */ + 0xffffc500 0x00000100 /* SMC PMECC Error Location regs */ + 0x00100000 0x00100000 /* ROM code */ + 0x70000000 0x10000000 /* NFC Command Registers */ + 0xffffc000 0x00000070 /* NFC HSMC regs */ + 0x00200000 0x00100000 /* NFC SRAM banks */ + >; + interrupts = <5 4 6>; + atmel,nand-addr-offset = <21>; + atmel,nand-cmd-offset = <22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand0_ale_cle>; + atmel,pmecc-lookup-table-offset = <0x10000 0x18000>; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/boot/dts/sama5d31ek.dts b/arch/arm/boot/dts/sama5d31ek.dts new file mode 100644 index 0000000..fa5d216 --- /dev/null +++ b/arch/arm/boot/dts/sama5d31ek.dts @@ -0,0 +1,51 @@ +/* + * sama5d31ek.dts - Device Tree file for SAMA5D31-EK board + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches + * + * Licensed under GPLv2 or later. + */ +/dts-v1/; +/include/ "sama5d3xmb.dtsi" +/include/ "sama5d3xdm.dtsi" + +/ { + model = "Atmel SAMA5D31-EK"; + compatible = "atmel,sama5d31ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; + + ahb { + apb { + spi0: spi@f0004000 { + status = "okay"; + }; + + ssc0: ssc@f0008000 { + status = "okay"; + }; + + i2c0: i2c@f0014000 { + status = "okay"; + }; + + i2c1: i2c@f0018000 { + status = "okay"; + }; + + macb1: ethernet@f802c000 { + status = "okay"; + }; + }; + }; + + leds { + d3 { + label = "d3"; + gpios = <&pioE 24 0>; + }; + }; + + sound { + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/sama5d33ek.dts b/arch/arm/boot/dts/sama5d33ek.dts new file mode 100644 index 0000000..c38c943 --- /dev/null +++ b/arch/arm/boot/dts/sama5d33ek.dts @@ -0,0 +1,44 @@ +/* + * sama5d33ek.dts - Device Tree file for SAMA5D33-EK board + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches + * + * Licensed under GPLv2 or later. + */ +/dts-v1/; +/include/ "sama5d3xmb.dtsi" +/include/ "sama5d3xdm.dtsi" + +/ { + model = "Atmel SAMA5D33-EK"; + compatible = "atmel,sama5d33ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; + + ahb { + apb { + spi0: spi@f0004000 { + status = "okay"; + }; + + ssc0: ssc@f0008000 { + status = "okay"; + }; + + i2c0: i2c@f0014000 { + status = "okay"; + }; + + i2c1: i2c@f0018000 { + status = "okay"; + }; + + macb0: ethernet@f0028000 { + status = "okay"; + }; + }; + }; + + sound { + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/sama5d34ek.dts b/arch/arm/boot/dts/sama5d34ek.dts new file mode 100644 index 0000000..d2739f8 --- /dev/null +++ b/arch/arm/boot/dts/sama5d34ek.dts @@ -0,0 +1,61 @@ +/* + * sama5d34ek.dts - Device Tree file for SAMA5D34-EK board + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches + * + * Licensed under GPLv2 or later. + */ +/dts-v1/; +/include/ "sama5d3xmb.dtsi" +/include/ "sama5d3xdm.dtsi" + +/ { + model = "Atmel SAMA5D34-EK"; + compatible = "atmel,sama5d34ek", "atmel,sama5ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; + + ahb { + apb { + spi0: spi@f0004000 { + status = "okay"; + }; + + ssc0: ssc@f0008000 { + status = "okay"; + }; + + can0: can@f000c000 { + status = "okay"; + }; + + i2c0: i2c@f0014000 { + status = "okay"; + }; + + i2c1: i2c@f0018000 { + status = "okay"; + + 24c256@50 { + compatible = "24c256"; + reg = <0x50>; + pagesize = <64>; + }; + }; + + macb0: ethernet@f0028000 { + status = "okay"; + }; + }; + }; + + leds { + d3 { + label = "d3"; + gpios = <&pioE 24 0>; + }; + }; + + sound { + status = "okay"; + }; +}; diff --git a/arch/arm/boot/dts/sama5d35ek.dts b/arch/arm/boot/dts/sama5d35ek.dts new file mode 100644 index 0000000..a488fc4 --- /dev/null +++ b/arch/arm/boot/dts/sama5d35ek.dts @@ -0,0 +1,56 @@ +/* + * sama5d35ek.dts - Device Tree file for SAMA5D35-EK board + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches + * + * Licensed under GPLv2 or later. + */ +/dts-v1/; +/include/ "sama5d3xmb.dtsi" + +/ { + model = "Atmel SAMA5D35-EK"; + compatible = "atmel,sama5d35ek", "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; + + ahb { + apb { + spi0: spi@f0004000 { + status = "okay"; + }; + + can0: can@f000c000 { + status = "okay"; + }; + + i2c1: i2c@f0018000 { + status = "okay"; + }; + + macb0: ethernet@f0028000 { + status = "okay"; + }; + + isi: isi@f0034000 { + status = "okay"; + }; + + macb1: ethernet@f802c000 { + status = "okay"; + }; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + + pb_user1 { + label = "pb_user1"; + gpios = <&pioE 27 0>; + linux,code = <0x100>; + gpio-key,wakeup; + }; + }; +}; diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi new file mode 100644 index 0000000..1f8ed40 --- /dev/null +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi @@ -0,0 +1,91 @@ +/* + * sama5d3xcm.dtsi - Device Tree Include file for SAMA5D3x CPU Module + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches + * + * Licensed under GPLv2 or later. + */ +/include/ "sama5d3.dtsi" + +/ { + compatible = "atmel,samad3xcm", "atmel,sama5d3", "atmel,sama5"; + + chosen { + bootargs = "console=ttyS0,115200 rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs"; + }; + + memory { + reg = <0x20000000 0x20000000>; + }; + + clocks { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + main_clock: clock@0 { + compatible = "atmel,osc", "fixed-clock"; + clock-frequency = <12000000>; + }; + }; + + ahb { + apb { + macb0: ethernet@f0028000 { + phy-mode = "rgmii"; + }; + }; + + nand0: nand@60000000 { + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + atmel,has-pmecc; + atmel,pmecc-cap = <4>; + atmel,pmecc-sector-size = <512>; + atmel,has-nfc; + atmel,use-nfc-sram; + nand-on-flash-bbt; + status = "okay"; + + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x40000>; + }; + + bootloader@40000 { + label = "bootloader"; + reg = <0x40000 0x80000>; + }; + + bootloaderenv@c0000 { + label = "bootloader env"; + reg = <0xc0000 0xc0000>; + }; + + dtb@180000 { + label = "device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "rootfs"; + reg = <0x800000 0x0f800000>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + d2 { + label = "d2"; + gpios = <&pioE 25 1>; /* PE25, conflicts with A25, RXD2 */ + }; + }; +}; diff --git a/arch/arm/boot/dts/sama5d3xdm.dtsi b/arch/arm/boot/dts/sama5d3xdm.dtsi new file mode 100644 index 0000000..4b8830e --- /dev/null +++ b/arch/arm/boot/dts/sama5d3xdm.dtsi @@ -0,0 +1,42 @@ +/* + * sama5d3dm.dtsi - Device Tree file for SAMA5 display module + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches + * + * Licensed under GPLv2 or later. + */ + +/ { + ahb { + apb { + i2c1: i2c@f0018000 { + qt1070: keyboard@1b { + compatible = "qt1070"; + reg = <0x1b>; + interrupt-parent = <&pioE>; + interrupts = <31 0x0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qt1070_irq>; + }; + }; + + adc0: adc@f8018000 { + status = "disabled"; + }; + + tsadcc: tsadcc@f8018000 { + status = "okay"; + }; + + pinctrl@fffff200 { + board { + pinctrl_qt1070_irq: qt1070_irq { + atmel,pins = + <4 31 0x0 0x5>; /* PE31 GPIO with pull up deglith */ + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi new file mode 100644 index 0000000..661d7ca --- /dev/null +++ b/arch/arm/boot/dts/sama5d3xmb.dtsi @@ -0,0 +1,166 @@ +/* + * sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board + * + * Copyright (C) 2013 Atmel, + * 2013 Ludovic Desroches + * + * Licensed under GPLv2 or later. + */ +/include/ "sama5d3xcm.dtsi" + +/ { + compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5"; + + ahb { + apb { + mmc0: mmc@f0000000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; + status = "okay"; + slot@0 { + reg = <0>; + bus-width = <4>; + cd-gpios = <&pioD 17 0>; + }; + }; + + spi0: spi@f0004000 { + m25p80@0 { + compatible = "atmel,at25df321a"; + spi-max-frequency = <50000000>; + reg = <0>; + }; + }; + + /* + * i2c0 conflicts with ISI: + * disable it to allow the use of ISI + * can not enable audio when i2c0 disabled + */ + i2c0: i2c@f0014000 { + wm8904: wm8904@1a { + compatible = "wm8904"; + reg = <0x1a>; + }; + }; + + usart1: serial@f0020000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>; + status = "okay"; + }; + + isi: isi@f0034000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_isi &pinctrl_isi_pck_as_mck &pinctrl_isi_power &pinctrl_isi_reset>; + }; + + mmc1: mmc@f8000000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3 &pinctrl_mmc1_cd>; + status = "okay"; + slot@0 { + reg = <0>; + bus-width = <4>; + cd-gpios = <&pioD 18 0>; + }; + }; + + adc0: adc@f8018000 { + pinctrl-names = "default"; + pinctrl-0 = < + &pinctrl_adc0_adtrg + &pinctrl_adc0_ad0 + &pinctrl_adc0_ad1 + &pinctrl_adc0_ad2 + &pinctrl_adc0_ad3 + &pinctrl_adc0_ad4 + >; + status = "okay"; + }; + + macb1: ethernet@f802c000 { + phy-mode = "rmii"; + }; + + pinctrl@fffff200 { + board { + pinctrl_mmc0_cd: mmc0_cd { + atmel,pins = + <3 17 0x0 0x5>; /* PD17 GPIO with pullup deglitch */ + }; + + pinctrl_mmc1_cd: mmc1_cd { + atmel,pins = + <3 18 0x0 0x5>; /* PD18 GPIO with pullup deglitch */ + }; + + pinctrl_pck0_as_audio_mck: pck0_as_audio_mck { + atmel,pins = + <3 30 0x2 0x0>; /* PD30 periph B */ + }; + + pinctrl_isi_reset: isi_reset-0 { + atmel,pins = + <4 24 0x0 0x0>; /* PE24 gpio */ + }; + + pinctrl_isi_power: isi_power-0 { + atmel,pins = + <4 29 0x0 0x0>; /* PE29 gpio */ + }; + + pinctrl_usba_vbus: usba_vbus { + atmel,pins = + <3 29 0x0 0x4>; /* PD29 GPIO with deglitch */ + }; + }; + }; + + dbgu: serial@ffffee00 { + status = "okay"; + }; + + watchdog@fffffe40 { + status = "okay"; + }; + }; + + usb0: gadget@00500000 { + atmel,vbus-gpio = <&pioD 29 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usba_vbus>; + status = "okay"; + }; + + usb1: ohci@00600000 { + num-ports = <3>; + atmel,vbus-gpio = <&pioD 25 0 + &pioD 26 1 + &pioD 27 1 + >; + status = "okay"; + }; + + usb2: ehci@00700000 { + status = "okay"; + }; + }; + + sound { + compatible = "atmel,sama5d3ek-wm8904"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pck0_as_audio_mck>; + + atmel,model = "wm8904 @ SAMA5D3EK"; + atmel,audio-routing = + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "IN1L", "Mic"; + + atmel,ssc-controller = <&ssc0>; + atmel,audio-codec = <&wm8904>; + }; +};