From patchwork Sat Mar 23 12:38:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steffen Trumtrar X-Patchwork-Id: 2324531 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 3E0B1400E6 for ; Sat, 23 Mar 2013 12:40:47 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UJNiQ-0005lp-77; Sat, 23 Mar 2013 12:38:30 +0000 Received: from metis.ext.pengutronix.de ([2001:6f8:1178:4:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UJNiN-0005l3-0p for linux-arm-kernel@lists.infradead.org; Sat, 23 Mar 2013 12:38:27 +0000 Received: from dude.hi.pengutronix.de ([2001:6f8:1178:2:21e:67ff:fe11:9c5c]) by metis.ext.pengutronix.de with esmtp (Exim 4.72) (envelope-from ) id 1UJNiL-0005au-61; Sat, 23 Mar 2013 13:38:25 +0100 Received: from str by dude.hi.pengutronix.de with local (Exim 4.80) (envelope-from ) id 1UJNiK-0004MR-W0; Sat, 23 Mar 2013 13:38:24 +0100 From: Steffen Trumtrar To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: zynq: add gem support Date: Sat, 23 Mar 2013 13:38:15 +0100 Message-Id: <1364042295-16710-1-git-send-email-s.trumtrar@pengutronix.de> X-Mailer: git-send-email 1.8.2.rc2 X-SA-Exim-Connect-IP: 2001:6f8:1178:2:21e:67ff:fe11:9c5c X-SA-Exim-Mail-From: str@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130323_083827_289177_D1BCC43A X-CRM114-Status: GOOD ( 10.99 ) X-Spam-Score: -4.4 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Josh Cartwright , Steffen Trumtrar , Michal Simek X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The zynq includes a Cadence GEM IP core. This is compatible with the macb driver. Add it to the zynq-7000 DT. Signed-off-by: Steffen Trumtrar Cc: Michal Simek Cc: Josh Cartwright --- arch/arm/boot/dts/zynq-7000.dtsi | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 0dd2dc7..88564fa 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -54,6 +54,26 @@ clocks = <&uart_clk 1>; }; + gem0: ethernet@e000b000 { + compatible = "cdns,gem"; + reg = <0xe000b000 0x4000>; + status = "disabled"; + interrupts = <0 22 4>; + clocks = <&gem0_clk 0>, <&gem0_clk 0>; + clock-names = "pclk", "hclk"; + phy-mode = "rgmii"; + }; + + gem1: ethernet@e000c000 { + compatible = "cdns,gem"; + reg = <0xe000c000 0x4000>; + status = "disabled"; + interrupts = <0 45 4>; + clocks = <&gem1_clk 0>, <&gem1_clk 0>; + clock-names = "pclk", "hclk"; + phy-mode = "rgmii"; + }; + slcr: slcr@f8000000 { compatible = "xlnx,zynq-slcr"; reg = <0xF8000000 0x1000>; @@ -89,6 +109,22 @@ reg = <0x108 0x118>; clock-output-names = "iopll"; }; + gem0_clk: gem0_clk { + #clock-cells = <1>; + compatible = "xlnx,zynq-periph-clock"; + clocks = <&iopll &armpll &ddrpll>; + reg = <0x140>; + clock-output-names = "gem0_ref_clk1", + "gem0_ref_clk2"; + }; + gem1_clk: gem1_clk { + #clock-cells = <1>; + compatible = "xlnx,zynq-periph-clock"; + clocks = <&iopll &armpll &ddrpll>; + reg = <0x144>; + clock-output-names = "gem1_ref_clk1", + "gem1_ref_clk2"; + }; uart_clk: uart_clk { #clock-cells = <1>; compatible = "xlnx,zynq-periph-clock";