From patchwork Mon Mar 25 10:05:07 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 2330241 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id 9FC5EDF24C for ; Mon, 25 Mar 2013 10:17:08 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UK4PM-0000oa-00; Mon, 25 Mar 2013 10:13:40 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UK4G9-0004Ho-2k for linux-arm-kernel@lists.infradead.org; Mon, 25 Mar 2013 10:04:11 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id r2PA445J018122; Mon, 25 Mar 2013 05:04:05 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2PA447n015726; Mon, 25 Mar 2013 15:34:04 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Mon, 25 Mar 2013 15:34:04 +0530 Received: from ula0393909.apr.dhcp.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2PA3Eg4016410; Mon, 25 Mar 2013 15:34:03 +0530 From: Santosh Shilimkar To: Subject: [PATCH v2 15/18] ARM: OMAP4+: CPUidle: Consolidate idle driver for OMAP5 support Date: Mon, 25 Mar 2013 15:35:07 +0530 Message-ID: <1364205910-32392-16-git-send-email-santosh.shilimkar@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1364205910-32392-1-git-send-email-santosh.shilimkar@ti.com> References: <1364205910-32392-1-git-send-email-santosh.shilimkar@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130325_060409_384931_BE0E1D75 X-CRM114-Status: GOOD ( 13.81 ) X-Spam-Score: -8.2 (--------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-8.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.40 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.3 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: nm@ti.com, tony@atomide.com, linux-omap@vger.kernel.org, Santosh Shilimkar , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The OMAP5 idle driver can re-use most of OMAP4 CPUidle driver implementation. Also the next derivative SOCs are going to re-use the MPUSS so, same driver with minor updates can be re-used. Prepare the code so that its easier to add CPUidle support for OMAP5 devices. Acked-by: Nishanth Menon Signed-off-by: Santosh Shilimkar --- arch/arm/mach-omap2/cpuidle44xx.c | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index b8a22f0..ac6d526 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -1,7 +1,7 @@ /* - * OMAP4 CPU idle Routines + * OMAP4PLUS CPU idle Routines * - * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011-2013 Texas Instruments, Inc. * Santosh Shilimkar * Rajendra Nayak * @@ -24,13 +24,13 @@ #include "clockdomain.h" /* Machine specific information */ -struct omap4_idle_statedata { +struct idle_statedata { u32 cpu_state; u32 mpu_logic_state; u32 mpu_state; }; -static struct omap4_idle_statedata omap4_idle_data[] = { +static struct idle_statedata omap4_idle_data[] = { { .cpu_state = PWRDM_POWER_ON, .mpu_state = PWRDM_POWER_ON, @@ -53,11 +53,12 @@ static struct clockdomain *cpu_clkdm[NR_CPUS]; static atomic_t abort_barrier; static bool cpu_done[NR_CPUS]; +static struct idle_statedata *state_ptr = &omap4_idle_data[0]; /* Private functions */ /** - * omap4_enter_idle_coupled_[simple/coupled] - OMAP4 cpuidle entry functions + * omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions * @dev: cpuidle device * @drv: cpuidle driver * @index: the index of state to be entered @@ -66,7 +67,7 @@ static bool cpu_done[NR_CPUS]; * specified low power state selected by the governor. * Returns the amount of time spent in the low power state. */ -static int omap4_enter_idle_simple(struct cpuidle_device *dev, +static int omap_enter_idle_simple(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { @@ -74,11 +75,11 @@ static int omap4_enter_idle_simple(struct cpuidle_device *dev, return index; } -static int omap4_enter_idle_coupled(struct cpuidle_device *dev, +static int omap_enter_idle_coupled(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - struct omap4_idle_statedata *cx = &omap4_idle_data[index]; + struct idle_statedata *cx = state_ptr + index; int cpu_id = smp_processor_id(); /* @@ -167,7 +168,7 @@ static void omap_setup_broadcast_timer(void *arg) clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu); } -static DEFINE_PER_CPU(struct cpuidle_device, omap4_idle_dev); +static DEFINE_PER_CPU(struct cpuidle_device, omap_idle_dev); static struct cpuidle_driver omap4_idle_driver = { .name = "omap4_idle", @@ -179,7 +180,7 @@ static struct cpuidle_driver omap4_idle_driver = { .exit_latency = 2 + 2, .target_residency = 5, .flags = CPUIDLE_FLAG_TIME_VALID, - .enter = omap4_enter_idle_simple, + .enter = omap_enter_idle_simple, .name = "C1", .desc = "CPUx ON, MPUSS ON" }, @@ -188,7 +189,7 @@ static struct cpuidle_driver omap4_idle_driver = { .exit_latency = 328 + 440, .target_residency = 960, .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED, - .enter = omap4_enter_idle_coupled, + .enter = omap_enter_idle_coupled, .name = "C2", .desc = "CPUx OFF, MPUSS CSWR", }, @@ -197,7 +198,7 @@ static struct cpuidle_driver omap4_idle_driver = { .exit_latency = 460 + 518, .target_residency = 1100, .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED, - .enter = omap4_enter_idle_coupled, + .enter = omap_enter_idle_coupled, .name = "C3", .desc = "CPUx OFF, MPUSS OSWR", }, @@ -209,9 +210,9 @@ static struct cpuidle_driver omap4_idle_driver = { /* Public functions */ /** - * omap4_idle_init - Init routine for OMAP4 idle + * omap4_idle_init - Init routine for OMAP4PLUS idle * - * Registers the OMAP4 specific cpuidle driver to the cpuidle + * Registers the OMAP4PLUS specific cpuidle driver to the cpuidle * framework with the valid set of states. */ int __init omap4_idle_init(void) @@ -239,7 +240,7 @@ int __init omap4_idle_init(void) } for_each_cpu(cpu_id, cpu_online_mask) { - dev = &per_cpu(omap4_idle_dev, cpu_id); + dev = &per_cpu(omap_idle_dev, cpu_id); dev->cpu = cpu_id; #ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED dev->coupled_cpus = *cpu_online_mask;