From patchwork Mon Mar 25 10:04:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 2329941 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 4A3473FC54 for ; Mon, 25 Mar 2013 10:10:46 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UK4JF-0005LZ-JQ; Mon, 25 Mar 2013 10:07:21 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UK4Fu-0004CL-3X for linux-arm-kernel@lists.infradead.org; Mon, 25 Mar 2013 10:03:56 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id r2PA3oI0018084; Mon, 25 Mar 2013 05:03:51 -0500 Received: from DBDE70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2PA3o2D015602; Mon, 25 Mar 2013 15:33:50 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by dbde70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 14.1.323.3; Mon, 25 Mar 2013 15:33:49 +0530 Received: from ula0393909.apr.dhcp.ti.com (smtpvbd.itg.ti.com [172.24.170.250]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2PA3Eft016410; Mon, 25 Mar 2013 15:33:49 +0530 From: Santosh Shilimkar To: Subject: [PATCH v2 06/18] ARM: OMAP5: PM: Enable Mercury retention mode on CPUx powerdomains Date: Mon, 25 Mar 2013 15:34:58 +0530 Message-ID: <1364205910-32392-7-git-send-email-santosh.shilimkar@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1364205910-32392-1-git-send-email-santosh.shilimkar@ti.com> References: <1364205910-32392-1-git-send-email-santosh.shilimkar@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130325_060354_393853_41A1268F X-CRM114-Status: GOOD ( 11.49 ) X-Spam-Score: -8.2 (--------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-8.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.40 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.3 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: nm@ti.com, tony@atomide.com, linux-omap@vger.kernel.org, Santosh Shilimkar , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org In addition to the standard power-management technique, the OMAP5 MPU subsystem also employs an SR3-APG (mercury) power management technology to reduce leakage. It allows for full logic and memories retention on MPU_C0 and MPU_C1 and is controlled by the PRCM_MPU. Acked-by: Nishanth Menon Signed-off-by: Santosh Shilimkar --- arch/arm/mach-omap2/omap-mpuss-lowpower.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index b1441b1..d390d18 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c @@ -62,6 +62,10 @@ #include "prm44xx.h" #include "prm-regbits-44xx.h" +/* Add defines needed for mercury mode. Refer MPU's PRM_PSCON_COUNT */ +#define PRM_PSCON_HG_EN (1 << 24) +#define PRM_PSCON_HG_RAMPUP (1 << 25) + #ifdef CONFIG_SMP struct omap4_cpu_pm_info { @@ -337,6 +341,28 @@ int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) return 0; } +/** + * enable_mercury_retention_mode: Enable OMAP5 mercury retention feature + * + * OMAP5 devices supports SR3-APG (mercury) power management technology to + * reduce leakage. It allows for full logic and memories retention on + * MPU_C0 and MPU_C1 and is controlled by the PRCM_MPU. The function enable + * the mercury retention feature. + */ +static void enable_mercury_retention_mode(void) +{ + u32 reg; + + /* + * To enable mercury mode, both HG_EN and HG_RAMPUP needs to be + * enabled from PRM_PSCON_COUNT register. + */ + reg = omap4_prcm_mpu_read_inst_reg(OMAP54XX_PRCM_MPU_DEVICE_INST, + OMAP54XX_PRCM_MPU_PRM_PSCON_COUNT_OFFSET); + reg |= PRM_PSCON_HG_EN | PRM_PSCON_HG_RAMPUP; + omap4_prcm_mpu_write_inst_reg(reg, OMAP54XX_PRCM_MPU_DEVICE_INST, + OMAP54XX_PRCM_MPU_PRM_PSCON_COUNT_OFFSET); +} /* * Initialise OMAP4 MPUSS @@ -415,6 +441,7 @@ int __init omap4_mpuss_init(void) cpu_context_offset = OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET; } else if (soc_is_omap54xx()) { cpu_context_offset = OMAP54XX_RM_CPU0_CPU0_CONTEXT_OFFSET; + enable_mercury_retention_mode(); } return 0;