From patchwork Mon Mar 25 18:19:12 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 2333091 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork2.kernel.org (Postfix) with ESMTP id B3D21DF24C for ; Mon, 25 Mar 2013 18:29:05 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UKC5G-0004Yf-FY; Mon, 25 Mar 2013 18:25:26 +0000 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UKBzR-0001NY-Tb for linux-arm-kernel@lists.infradead.org; Mon, 25 Mar 2013 18:19:26 +0000 Received: from mudshark.cambridge.arm.com (mudshark.cambridge.arm.com [10.1.79.58]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id r2PIJMki013055; Mon, 25 Mar 2013 18:19:22 GMT Received: by mudshark.cambridge.arm.com (Postfix, from userid 1000) id DCEFBC22D0; Mon, 25 Mar 2013 18:19:13 +0000 (GMT) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] ARM: tegra: use CS_LAR_KEY definition instead of 0xC5ACCE55 Date: Mon, 25 Mar 2013 18:19:12 +0000 Message-Id: <1364235552-17851-2-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1364235552-17851-1-git-send-email-will.deacon@arm.com> References: <1364235552-17851-1-git-send-email-will.deacon@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130325_141926_398659_BA9D2968 X-CRM114-Status: GOOD ( 11.18 ) X-Spam-Score: -8.2 (--------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-8.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [217.140.96.50 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.3 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-tegra@vger.kernel.org, Will Deacon , Dietmar Eggemann , Stephen Warren X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org When enabling coresight on secondary cores for tegra, make use of our fancy new definition for the magic lock code. Cc: Stephen Warren Signed-off-by: Dietmar Eggemann Signed-off-by: Will Deacon --- arch/arm/mach-tegra/headsmp.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-tegra/headsmp.S b/arch/arm/mach-tegra/headsmp.S index fd473f2..d2747fe 100644 --- a/arch/arm/mach-tegra/headsmp.S +++ b/arch/arm/mach-tegra/headsmp.S @@ -1,6 +1,7 @@ #include #include +#include #include "sleep.h" .section ".text.head", "ax" @@ -8,7 +9,7 @@ ENTRY(tegra_secondary_startup) bl v7_invalidate_l1 /* Enable coresight */ - mov32 r0, 0xC5ACCE55 + mov32 r0, CS_LAR_KEY mcr p14, 0, r0, c7, c12, 6 b secondary_startup ENDPROC(tegra_secondary_startup)