From patchwork Tue Apr 2 14:32:26 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 2378771 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by patchwork1.kernel.org (Postfix) with ESMTP id 7AEF63FD8C for ; Tue, 2 Apr 2013 14:36:13 +0000 (UTC) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UN2Gp-0006Jq-Fp; Tue, 02 Apr 2013 14:33:07 +0000 Received: from db3ehsobe002.messaging.microsoft.com ([213.199.154.140] helo=db3outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UN2Fq-0005i4-Ut for linux-arm-kernel@lists.infradead.org; Tue, 02 Apr 2013 14:32:07 +0000 Received: from mail14-db3-R.bigfish.com (10.3.81.234) by DB3EHSOBE003.bigfish.com (10.3.84.23) with Microsoft SMTP Server id 14.1.225.23; Tue, 2 Apr 2013 14:32:04 +0000 Received: from mail14-db3 (localhost [127.0.0.1]) by mail14-db3-R.bigfish.com (Postfix) with ESMTP id F07D2A020E; Tue, 2 Apr 2013 14:32:03 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 11 X-BigFish: VS11(z3335szzz1f42h1fc6h1ee6h1de0h1202h1e76h1d1ah1d2ahzz8275dhz2dh87h2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail14-db3 (localhost.localdomain [127.0.0.1]) by mail14-db3 (MessageSwitch) id 1364913121470373_29425; Tue, 2 Apr 2013 14:32:01 +0000 (UTC) Received: from DB3EHSMHS004.bigfish.com (unknown [10.3.81.244]) by mail14-db3.bigfish.com (Postfix) with ESMTP id 6DE2A2A0073; Tue, 2 Apr 2013 14:32:01 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB3EHSMHS004.bigfish.com (10.3.87.104) with Microsoft SMTP Server (TLS) id 14.1.225.23; Tue, 2 Apr 2013 14:32:00 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.2.328.11; Tue, 2 Apr 2013 14:31:58 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.238]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r32EVuYa003185; Tue, 2 Apr 2013 07:31:57 -0700 From: Shawn Guo To: Subject: [PATCH] ARM: imx: do not bring up unavailable cores Date: Tue, 2 Apr 2013 22:32:26 +0800 Message-ID: <1364913146-26084-1-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130402_103207_152306_B1C8DAC8 X-CRM114-Status: GOOD ( 11.48 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [213.199.154.140 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The i.MX6 Quad can be fused as i.MX6 Dual chip, and similarly i.MX6 DualLite can be fused as i.MX6 Solo. The actual number of available cores can be found out from SCU. Since we do not reflect the fusing thing in device tree, the function arm_dt_init_cpu_maps() will always call set_cpu_possible(true) for 4 cores on i.MX6 Quad/Dual and 2 cores for i.MX6 DualLite/Solo. This causes failures when kernel tries to bring those unavailable cores online. For example, the following failure message will be seen when booting an i.MX6 Solo chip. CPU1: failed to come online Though kernel will still boot fine, the message is somehow annoying. Let's get rid of it by calling set_cpu_possible(false) on those unavailable cores. While at it, the set_cpu_possible(true) for available cores is removed, since it's already been done in arm_dt_init_cpu_maps(). Signed-off-by: Shawn Guo --- arch/arm/mach-imx/platsmp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index 7c0b03f..7061bde 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c @@ -79,8 +79,8 @@ static void __init imx_smp_init_cpus(void) ncores = scu_get_core_count(scu_base); - for (i = 0; i < ncores; i++) - set_cpu_possible(i, true); + for (i = ncores; i < NR_CPUS; i++) + set_cpu_possible(i, false); } void imx_smp_prepare(void)