From patchwork Thu Apr 4 16:37:11 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 2394171 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 3D700DF25A for ; Thu, 4 Apr 2013 16:43:53 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UNnGR-00033S-AT for patchwork-linux-arm@patchwork.kernel.org; Thu, 04 Apr 2013 16:43:51 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UNnFH-0006HY-AU; Thu, 04 Apr 2013 16:42:39 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UNnCd-0004La-VP for linux-arm-kernel@lists.infradead.org; Thu, 04 Apr 2013 16:39:59 +0000 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MKQ008ALOYAS790@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 05 Apr 2013 01:39:54 +0900 (KST) X-AuditID: cbfee61a-b7fa86d0000045ae-ae-515dacda21c3 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 7E.98.17838.ADCAD515; Fri, 05 Apr 2013 01:39:54 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MKQ00F2OOU1P170@mmp1.samsung.com>; Fri, 05 Apr 2013 01:39:54 +0900 (KST) From: Tomasz Figa To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 14/14] ARM: SAMSUNG: Remove unused PWM timer IRQ chip code Date: Thu, 04 Apr 2013 18:37:11 +0200 Message-id: <1365093431-30621-15-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.7.10 In-reply-to: <1365093431-30621-1-git-send-email-t.figa@samsung.com> References: <1365093431-30621-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrGIsWRmVeSWpSXmKPExsVy+t9jAd1ba2IDDU71aVv8nXSM3WLv23+M Fv9mn2KzuPX5EbvFxpUf2SwOzH7IanG0x87i/6PXrBanL11jtDi4bimrxZnfuha9C66yWazY eoHF4mzTG3aLTY+vsVrMOL+PyeL2ZV6L39saWSzWHrnLbrH0+kUmi0vzmlgsvn/7xmZxupvV Yt7nnUwW62e8ZrHYvGkqs8WqXX8YHaQ91sxbw+jR0tzD5vH71yRGj52z7rJ73Lm2h83j3blz 7B7zTgZ6bF5S73F+xkJGj5cTf7N59G1Zxehx/s1UFo/t1+Yxe0x7fZ7N4/MmOY/XN2YzBghE cdmkpOZklqUW6dslcGW0v7rIUnDKsuL7+l3sDYyn9bsYOTkkBEwkzpw8yAphi0lcuLeerYuR i0NIYBGjRN+dLWAJIYEuJonHG4VAbDYBNYnPDY/YQGwRAQ2JKV2P2UFsZoFOVold00W6GDk4 hAV8JZbfcQMxWQRUJXp31oNU8Ao4S/TOPsQIsUpe4un9PrApnEDx/2c/MEFscpJo+32IcQIj 7wJGhlWMoqkFyQXFSem5hnrFibnFpXnpesn5uZsYwbH3TGoH48oGi0OMAhyMSjy8GX2xgUKs iWXFlbmHGCU4mJVEeI+2AIV4UxIrq1KL8uOLSnNSiw8xSnOwKInzHmi1DhQSSE8sSc1OTS1I LYLJMnFwSjUwLhfa89/AUfpRcFWxq0PX3+xu9V8W1gXrLlyvMnVKKvvoZJKiGRd+0n2N69z6 O6+yX8yzmH0ycunsG0/ezewWTPR+cO2nedStWTp7BFVPKnBHH4vjsFq87HuSVlLzLSXfCcmh 2p77X1WxpOkE6v31XdSzkJHlve8eY4Y5Wvk77jgu3+cszTxdiaU4I9FQi7moOBEApoOYfbkC AAA= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130404_123956_524167_7022D69E X-CRM114-Status: GOOD ( 18.19 ) X-Spam-Score: -7.5 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.33 listed in list.dnswl.org] 1.7 KHOP_BIG_TO_CC Sent to 10+ recipients instaed of Bcc or a list -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -2.4 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: mark.rutland@arm.com, heiko@sntech.de, Tomasz Figa , tomasz.figa@gmail.com, buserror@gmail.com, jacmet@sunsite.dk, augulis.darius@gmail.com, christer@weinigel.se, sylvester.nawrocki@gmail.com, m.szyprowski@samsung.com, kgene.kim@samsung.com, linux@arm.linux.org.uk, sameo@linux.intel.com, kwangwoo.lee@gmail.com, mcuelenaere@gmail.com, arnd@arndb.de, devicetree-discuss@lists.ozlabs.org, linux-samsung-soc@vger.kernel.org, john.stultz@linaro.org, ghcstop@gmail.com, linux@simtec.co.uk, broonie@opensource.wolfsonmicro.com, jekhor@gmail.com, kyungmin.park@samsung.com, tglx@linutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org As the need for an IRQ chip handling PWM timer interrupt chaining is gone now, this patch removes all the code made unnecessary. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- arch/arm/Kconfig | 1 - arch/arm/mach-s3c64xx/common.c | 1 - arch/arm/plat-samsung/Kconfig | 6 -- arch/arm/plat-samsung/Makefile | 1 - arch/arm/plat-samsung/include/plat/irq-vic-timer.h | 13 --- arch/arm/plat-samsung/irq-vic-timer.c | 98 ---------------------- arch/arm/plat-samsung/s5p-irq.c | 1 - 7 files changed, 121 deletions(-) delete mode 100644 arch/arm/plat-samsung/include/plat/irq-vic-timer.h delete mode 100644 arch/arm/plat-samsung/irq-vic-timer.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dd68dec..ed584d4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -806,7 +806,6 @@ config ARCH_S3C64XX select S3C_GPIO_TRACK select SAMSUNG_CLKSRC select SAMSUNG_GPIOLIB_4BIT - select SAMSUNG_IRQ_VIC_TIMER select USB_ARCH_HAS_OHCI help Samsung S3C64XX series based systems diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c index 5dca83a..e2134b0 100644 --- a/arch/arm/mach-s3c64xx/common.c +++ b/arch/arm/mach-s3c64xx/common.c @@ -42,7 +42,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 6f632ba..9951879 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -27,7 +27,6 @@ config PLAT_S5P select S5P_GPIO_DRVSTR select SAMSUNG_CLKSRC if !COMMON_CLK select SAMSUNG_GPIOLIB_4BIT - select SAMSUNG_IRQ_VIC_TIMER help Base platform code for Samsung's S5P series SoC. @@ -79,11 +78,6 @@ config S5P_CLOCK # options for IRQ support -config SAMSUNG_IRQ_VIC_TIMER - bool - help - Internal configuration to build the VIC timer interrupt code. - config S5P_IRQ def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS) help diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 87494e1..ae2a0fd 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -19,7 +19,6 @@ obj-$(CONFIG_SAMSUNG_CLOCK) += pwm-clock.o obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o -obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o obj-$(CONFIG_S5P_IRQ) += s5p-irq.o obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o diff --git a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h deleted file mode 100644 index 5b9c42f..0000000 --- a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h +++ /dev/null @@ -1,13 +0,0 @@ -/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h - * - * Copyright (c) 2010 Simtec Electronics - * Ben Dooks - * - * Header file for Samsung SoC IRQ VIC timer - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -extern void s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq); diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c deleted file mode 100644 index f980cf3..0000000 --- a/arch/arm/plat-samsung/irq-vic-timer.c +++ /dev/null @@ -1,98 +0,0 @@ -/* arch/arm/plat-samsung/irq-vic-timer.c - * originally part of arch/arm/plat-s3c64xx/irq.c - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * S3C64XX - Interrupt handling - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc) -{ - struct irq_chip *chip = irq_get_chip(irq); - chained_irq_enter(chip, desc); - generic_handle_irq((int)desc->irq_data.handler_data); - chained_irq_exit(chip, desc); -} - -/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */ -static void s3c_irq_timer_ack(struct irq_data *d) -{ - struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); - u32 mask = (1 << 5) << (d->irq - gc->irq_base); - - irq_reg_writel(mask | gc->mask_cache, gc->reg_base); -} - -/** - * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\ - * @num: Number of timers to initialize - * @timer_irq: Base IRQ number to be used for the timers. - * - * Register the necessary IRQ chaining and support for the timer IRQs - * chained of the VIC. - */ -void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq) -{ - unsigned int pirq[5] = { IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC, - IRQ_TIMER3_VIC, IRQ_TIMER4_VIC }; - struct irq_chip_generic *s3c_tgc; - struct irq_chip_type *ct; - unsigned int i; - -#ifdef CONFIG_ARCH_EXYNOS - if (soc_is_exynos5250()) { - pirq[0] = EXYNOS5_IRQ_TIMER0_VIC; - pirq[1] = EXYNOS5_IRQ_TIMER1_VIC; - pirq[2] = EXYNOS5_IRQ_TIMER2_VIC; - pirq[3] = EXYNOS5_IRQ_TIMER3_VIC; - pirq[4] = EXYNOS5_IRQ_TIMER4_VIC; - } else { - pirq[0] = EXYNOS4_IRQ_TIMER0_VIC; - pirq[1] = EXYNOS4_IRQ_TIMER1_VIC; - pirq[2] = EXYNOS4_IRQ_TIMER2_VIC; - pirq[3] = EXYNOS4_IRQ_TIMER3_VIC; - pirq[4] = EXYNOS4_IRQ_TIMER4_VIC; - } -#endif - s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq, - S3C64XX_TINT_CSTAT, handle_level_irq); - - if (!s3c_tgc) { - pr_err("%s: irq_alloc_generic_chip for IRQ %d failed\n", - __func__, timer_irq); - return; - } - - ct = s3c_tgc->chip_types; - ct->chip.irq_mask = irq_gc_mask_clr_bit; - ct->chip.irq_unmask = irq_gc_mask_set_bit; - ct->chip.irq_ack = s3c_irq_timer_ack; - irq_setup_generic_chip(s3c_tgc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE, - IRQ_NOREQUEST | IRQ_NOPROBE, 0); - /* Clear the upper bits of the mask_cache*/ - s3c_tgc->mask_cache &= 0x1f; - - for (i = 0; i < num; i++, timer_irq++) { - irq_set_chained_handler(pirq[i], s3c_irq_demux_vic_timer); - irq_set_handler_data(pirq[i], (void *)timer_irq); - } -} diff --git a/arch/arm/plat-samsung/s5p-irq.c b/arch/arm/plat-samsung/s5p-irq.c index ce8564d..b1e2a82 100644 --- a/arch/arm/plat-samsung/s5p-irq.c +++ b/arch/arm/plat-samsung/s5p-irq.c @@ -18,7 +18,6 @@ #include #include #include -#include void __init s5p_init_irq(u32 *vic, u32 num_vic) {