From patchwork Fri Apr 5 06:23:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Padmavathi Venna X-Patchwork-Id: 2396941 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 3C7A93FD8C for ; Fri, 5 Apr 2013 06:24:54 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UO04z-0007yO-F5 for patchwork-linux-arm@patchwork.kernel.org; Fri, 05 Apr 2013 06:24:53 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UO04E-0003yu-Ei; Fri, 05 Apr 2013 06:24:06 +0000 Received: from mailout2.samsung.com ([203.254.224.25]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UO03s-0003rg-FO for linux-arm-kernel@lists.infradead.org; Fri, 05 Apr 2013 06:23:45 +0000 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MKR00LBER3B0SK0@mailout2.samsung.com> for linux-arm-kernel@lists.infradead.org; Fri, 05 Apr 2013 15:23:38 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.126]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 4E.D4.05174.9ED6E515; Fri, 05 Apr 2013 15:23:37 +0900 (KST) X-AuditID: cbfee68f-b7f4a6d000001436-a7-515e6de927aa Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id A3.3E.17838.9ED6E515; Fri, 05 Apr 2013 15:23:37 +0900 (KST) Received: from padma-linuxpc.sisodomain.com ([107.108.83.35]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MKR0095TR2YI080@mmp1.samsung.com>; Fri, 05 Apr 2013 15:23:37 +0900 (KST) From: Padmavathi Venna To: linux-samsung-soc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, padma.v@samsung.com, padma.kvr@gmail.com Subject: [PATCH 2/3] ARM: dts: add Exynos audio subsystem clock controller node Date: Fri, 05 Apr 2013 11:53:48 +0530 Message-id: <1365143029-16936-2-git-send-email-padma.v@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1365143029-16936-1-git-send-email-padma.v@samsung.com> References: <1365143029-16936-1-git-send-email-padma.v@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmplkeLIzCtJLcpLzFFi42JZI2JSp/syNy7Q4P4PG4t/s0+xWRyY/ZDV onfBVTaLTY+vsVrMOL+PyaJ92RxWi983v7NZ/Gg4zGhxccUXJgdOj52z7rJ7bF5S73F+xkJG j5cTf7N59G1ZxejxeZNcAFsUl01Kak5mWWqRvl0CV8aDvpMsBdvZKk6172JsYFzN2sXIySEh YCLx8v4eNghbTOLCvfVANheHkMBSRonH67axwxR1brnDDJFYxChx5eZBRginh0lif/NFoBYO DjYBHYmWsy4gcRGBOYwSzdtnMIJ0MwsUSNy7MBlskrCAv0TPkX1gNouAqsTqzYfBzuAVcJY4 NLUBapuCxLGpX8HinAIuEnMfzwOLCwHVrLp3Hew8CYFN7BIH99xlhBgkIPFt8iEWkCMkBGQl Nh1ghpgjKXFwxQ2WCYzCCxgZVjGKphYkFxQnpRcZ6xUn5haX5qXrJefnbmIERsHpf8/6dzDe PWB9iDEZaNxEZinR5HxgFOWVxBsamxlZmJqYGhuZW5qRJqwkzqvWYh0oJJCeWJKanZpakFoU X1Sak1p8iJGJg1OqgbE3+skjmbM51iK3m4Pvr4icXuv97c4WqeyqufM8ptXdlOD/dGP3rNsx 3rX9IgXnj8+ZeOgtu3Lez0hDu+Xyj6braHW7/ZnCqHTGTGlzjfCKgj67RNeF2c/+acTxlL3x Pnv46peI+xs23/98qvdrRs+K41E/F2V2XOycsvPs+sNnDa5ub7jZ9XymEktxRqKhFnNRcSIA GT94bZgCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrEIsWRmVeSWpSXmKPExsVy+t9jAd2XuXGBBk0PTCz+zT7FZnFg9kNW i94FV9ksNj2+xmox4/w+Jov2ZXNYLX7f/M5m8aPhMKPFxRVfmBw4PXbOusvusXlJvcf5GQsZ PV5O/M3m0bdlFaPH501yAWxRDYw2GamJKalFCql5yfkpmXnptkrewfHO8aZmBoa6hpYW5koK eYm5qbZKLj4Bum6ZOUBXKSmUJeaUAoUCEouLlfTtME0IDXHTtYBpjND1DQmC6zEyQAMJaxgz HvSdZCnYzlZxqn0XYwPjatYuRk4OCQETic4td5ghbDGJC/fWs3UxcnEICSxilLhy8yAjhNPD JLG/+SJQhoODTUBHouWsC0hcRGAOo0Tz9hmMIN3MAgUS9y5MZgexhQX8JXqO7AOzWQRUJVZv Pgy2jVfAWeLQ1AZ2iG0KEsemfgWLcwq4SMx9PA8sLgRUs+redbYJjLwLGBlWMYqmFiQXFCel 5xrqFSfmFpfmpesl5+duYgTH2DOpHYwrGywOMQpwMCrx8Gb0xQYKsSaWFVfmHmKU4GBWEuHd yRcXKMSbklhZlVqUH19UmpNafIgxGeiqicxSosn5wPjPK4k3NDYxNzU2tTSxMDGzJE1YSZz3 QKt1oJBAemJJanZqakFqEcwWJg5OqQZG8bMzV3yM37LnqbhXvNUdH0vp++XuC9/5hS15J/HT Iy8tdW5g9KMlVTva+A27hJ1WvOjy0v3p8tEhaLabS2Y8t6+BnsCr++bPt25qevgytHT3P28V cxNRpb9poYaxVsXT3narLXk7I7ZrkdRa2WP3ZSP6FY2LWhZeT/VYyT1BwXjJ1l8r5ncpsRRn JBpqMRcVJwIAaqbM1/UCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130405_022344_786723_3FF69086 X-CRM114-Status: UNSURE ( 7.81 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -9.3 (---------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-9.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.25 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -2.4 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: sbkim73@samsung.com, kgene.kim@samsung.com, sangsu4u.park@samsung.com, broonie@opensource.wolfsonmicro.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Audio subsystem introduced in exynos platforms which has a internal clock controller. This patch adds a node for the same. Signed-off-by: Padmavathi Venna --- arch/arm/boot/dts/exynos5250.dtsi | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 7751e69..14d454c 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -67,6 +67,12 @@ #clock-cells = <1>; }; + clock_audss: audss-clock-controller@0x03810000 { + compatible = "samsung,exynos-audss-clock"; + reg = <0x03810000 0x100>; + #clock-cells = <1>; + }; + gic:interrupt-controller@10481000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>;