@@ -66,7 +66,6 @@
serial0: serial@1c42000 {
compatible = "ns16550a";
reg = <0x42000 0x100>;
- clock-frequency = <150000000>;
reg-shift = <2>;
interrupts = <25>;
status = "disabled";
@@ -74,7 +73,6 @@
serial1: serial@1d0c000 {
compatible = "ns16550a";
reg = <0x10c000 0x100>;
- clock-frequency = <150000000>;
reg-shift = <2>;
interrupts = <53>;
status = "disabled";
@@ -82,7 +80,6 @@
serial2: serial@1d0d000 {
compatible = "ns16550a";
reg = <0x10d000 0x100>;
- clock-frequency = <150000000>;
reg-shift = <2>;
interrupts = <61>;
status = "disabled";
DT kernel on da850-evm comes up with garbled UART logs. This is because of mismatch in actual module clock rate and rate specified(clock-frequency) in DT blob. kernel should not assume or depend on bootloaders clock configuration, instead let it find the clock rate at runtime. Issue discussed here before arriving on this implementation: "ARM: davinci: da850 evm: update clock rate for UART 1/2 DT nodes" https://patchwork.kernel.org/patch/2162271/ Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> --- arch/arm/boot/dts/da850.dtsi | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-)