From patchwork Mon Apr 15 08:48:41 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 2444381 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 533733FD8C for ; Mon, 15 Apr 2013 08:49:00 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1URf5r-0005o0-D8; Mon, 15 Apr 2013 08:48:55 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1URf5p-0004kv-1Q; Mon, 15 Apr 2013 08:48:53 +0000 Received: from arroyo.ext.ti.com ([192.94.94.40]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1URf5k-0004kb-TL for linux-arm-kernel@lists.infradead.org; Mon, 15 Apr 2013 08:48:50 +0000 Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id r3F8mkhu006180; Mon, 15 Apr 2013 03:48:46 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id r3F8mkhA014968; Mon, 15 Apr 2013 03:48:46 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Mon, 15 Apr 2013 03:48:45 -0500 Received: from localhost.localdomain (h16-72.vpn.ti.com [172.24.16.72]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r3F8mhQ9016550; Mon, 15 Apr 2013 03:48:43 -0500 From: Roger Quadros To: Subject: [PATCH] ARM: dts: omap4-panda: Add USB Host support Date: Mon, 15 Apr 2013 11:48:41 +0300 Message-ID: <1366015721-25608-1-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.7.4.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130415_044849_059049_2EB246E8 X-CRM114-Status: UNSURE ( 9.65 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -7.6 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.40 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: nm@ti.com, paul@pwsan.com, tony@atomide.com, devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Roger Quadros X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Provide the RESET and Power regulators for the USB PHY, the USB Host port mode and the PHY device. The USB PHY needs AUXCLK3 to operate. Provide this information as well. Also provide pin multiplexer information for the USB host pins. This patch depends on OMAP clock binding introduced in https://lkml.org/lkml/2013/4/12/407 CC: Benoît Cousson Signed-off-by: Roger Quadros --- arch/arm/boot/dts/omap4-panda-common.dtsi | 58 +++++++++++++++++++++++++++++ arch/arm/boot/dts/omap4.dtsi | 5 ++ 2 files changed, 63 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 03bd60d..628f744 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -54,6 +54,38 @@ "AFML", "Line In", "AFMR", "Line In"; }; + + /* HS USB Port 1 RESET */ + hsusb1_reset: hsusb1_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb1_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 30 0>; /* gpio_62 */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Port 1 Power */ + hsusb1_power: hsusb1_power_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb1_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 1 0>; /* gpio_1 */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Host PHY on PORT 1 */ + hsusb1_phy: hsusb1_phy { + compatible = "usb-nop-xceiv"; + reset-supply = <&hsusb1_reset>; + vcc-supply = <&hsusb1_power>; + clocks = <&auxclk3>; + clock-names = "main_clk"; + clock-frequency = <19200000>; + }; }; &omap4_pmx_core { @@ -64,6 +96,7 @@ &mcbsp1_pins &dss_hdmi_pins &tpd12s015_pins + &hsusbb1_pins >; twl6040_pins: pinmux_twl6040_pins { @@ -108,6 +141,23 @@ >; }; + hsusbb1_pins: pinmux_hsusbb1_pins { + pinctrl-single,pins = < + 0x82 0x10C /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_clk INPUT | PULLDOWN */ + 0x84 0x4 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_stp OUTPUT */ + 0x86 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dir INPUT | PULLDOWN */ + 0x88 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_nxt INPUT | PULLDOWN */ + 0x8a 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat0 INPUT | PULLDOWN */ + 0x8c 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat1 INPUT | PULLDOWN */ + 0x8e 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat2 INPUT | PULLDOWN */ + 0x90 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat3 INPUT | PULLDOWN */ + 0x92 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat4 INPUT | PULLDOWN */ + 0x94 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat5 INPUT | PULLDOWN */ + 0x96 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat6 INPUT | PULLDOWN */ + 0x98 0x104 /* USBB1_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat7 INPUT | PULLDOWN */ + >; + }; + i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < 0xe2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ @@ -249,3 +299,11 @@ mode = <3>; power = <50>; }; + +&usbhshost { + port1-mode = "ehci-phy"; +}; + +&usbhsehci { + phys = <&hsusb1_phy>; +}; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 2a56428..bd6036e 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -660,5 +660,10 @@ ram-bits = <12>; ti,has-mailbox; }; + + auxclk3: auxclk3 { + #clock-cells = <0>; + compatible = "ti,omap-clock"; + }; }; };