From patchwork Mon Apr 22 06:00:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Behme X-Patchwork-Id: 2470151 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id A7A0C3FD40 for ; Mon, 22 Apr 2013 06:01:01 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UU9o6-000595-6x; Mon, 22 Apr 2013 06:00:54 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UU9o3-0006hL-Oe; Mon, 22 Apr 2013 06:00:51 +0000 Received: from smtp6-v.fe.bosch.de ([2a03:cc00:ff0:100::2]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UU9o0-0006gq-5l for linux-arm-kernel@lists.infradead.org; Mon, 22 Apr 2013 06:00:50 +0000 Received: from vsmta12.fe.internet.bosch.com (unknown [10.4.98.52]) by imta23.fe.bosch.de (Postfix) with ESMTP id 7445815801D4 for ; Mon, 22 Apr 2013 08:00:41 +0200 (CEST) Received: from localhost (vsgw1.fe.internet.bosch.com [10.4.98.15]) by vsmta12.fe.internet.bosch.com (Postfix) with SMTP id 5BFCD1B80DF2 for ; Mon, 22 Apr 2013 08:00:41 +0200 (CEST) Received: from SI-HUB1001.de.bosch.com (10.4.103.108) by si-hub04.de.bosch.com (10.3.153.46) with Microsoft SMTP Server (TLS) id 8.3.298.1; Mon, 22 Apr 2013 08:00:37 +0200 Received: from hi-z5661.hi.de.bosch.com (10.34.217.143) by SI-HUB1001.de.bosch.com (10.4.103.108) with Microsoft SMTP Server id 14.3.123.3; Mon, 22 Apr 2013 08:00:37 +0200 Received: from hi-z5661.hi.de.bosch.com (localhost [127.0.0.1]) by hi-z5661.hi.de.bosch.com (Postfix) with ESMTP id 76E8840A6E; Mon, 22 Apr 2013 08:00:37 +0200 (CEST) From: Dirk Behme To: Subject: [PATCH] ARM i.MX6: correct MLB clock configuration Date: Mon, 22 Apr 2013 08:00:34 +0200 Message-ID: <1366610434-23042-1-git-send-email-dirk.behme@de.bosch.com> X-Mailer: git-send-email 1.8.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130422_020048_619621_B3B52B63 X-CRM114-Status: GOOD ( 11.44 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Jiada Wang , Dirk Behme , Dirk Behme , Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Dirk Behme According to the i.MX6 Dual/Quad technical reference manual (Figure 18-2. Clock Tree - Part 1) the MLB clock is directly feed by the AXI_CLK_ROOT. This is called 'axi' in our code. Note that the clock of the MLB IP block on the i.MX6 is completely independent of the PLL8 (MLB PLL). The MLB PLL isn't responsible for feeding the MLB IP block with a clock. Instead, it's used internally by the MLB module to sync the bus clock in case the MLB 6-pin interface is enabled: MediaLB Control 0 Register, MLB150_MLBC0[5], MLBPEN: 1 MediaLB 6-pin interface enabled. MLB PLL and MLB PHY is enabled in this case. I.e. the PLL8 MLB PLL has to be handled by the MLB driver and isn't needed for clocking the MLB module itself. Signed-off-by: Dirk Behme CC: Shawn Guo CC: Jiada Wang --- arch/arm/mach-imx/clk-imx6q.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index d38e54f..fd0189d 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -399,7 +399,7 @@ int __init mx6q_clocks_init(void) clk[ldb_di1] = imx_clk_gate2("ldb_di1", "ldb_di1_podf", base + 0x74, 14); clk[ipu2_di1] = imx_clk_gate2("ipu2_di1", "ipu2_di1_sel", base + 0x74, 10); clk[hsi_tx] = imx_clk_gate2("hsi_tx", "hsi_tx_podf", base + 0x74, 16); - clk[mlb] = imx_clk_gate2("mlb", "pll8_mlb", base + 0x74, 18); + clk[mlb] = imx_clk_gate2("mlb", "axi", base + 0x74, 18); clk[mmdc_ch0_axi] = imx_clk_gate2("mmdc_ch0_axi", "mmdc_ch0_axi_podf", base + 0x74, 20); clk[mmdc_ch1_axi] = imx_clk_gate2("mmdc_ch1_axi", "mmdc_ch1_axi_podf", base + 0x74, 22); clk[ocram] = imx_clk_gate2("ocram", "ahb", base + 0x74, 28);