From patchwork Tue Apr 23 15:46:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 2478351 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id C90BEDFE86 for ; Tue, 23 Apr 2013 15:48:17 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UUfRZ-0006h9-On; Tue, 23 Apr 2013 15:47:45 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UUfRN-0004FL-Dr; Tue, 23 Apr 2013 15:47:33 +0000 Received: from mailout3.samsung.com ([203.254.224.33]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UUfRG-0004EF-J6 for linux-arm-kernel@lists.infradead.org; Tue, 23 Apr 2013 15:47:28 +0000 Received: from epcpsbgm2.samsung.com (epcpsbgm2 [203.254.230.27]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MLP001J4T6W7M20@mailout3.samsung.com> for linux-arm-kernel@lists.infradead.org; Wed, 24 Apr 2013 00:47:20 +0900 (KST) X-AuditID: cbfee61b-b7f8e6d000000f44-cd-5176ad08f0f3 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 3C.70.03908.80DA6715; Wed, 24 Apr 2013 00:47:20 +0900 (KST) Received: from mcdsrvbld02.digital.local ([106.116.37.23]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MLP0032TT5SFQ80@mmp1.samsung.com>; Wed, 24 Apr 2013 00:47:20 +0900 (KST) From: Tomasz Figa To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 01/13] Documentation: Add device tree bindings for Samsung PWM timers Date: Tue, 23 Apr 2013 17:46:22 +0200 Message-id: <1366731994-7478-2-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.7.10 In-reply-to: <1366731994-7478-1-git-send-email-t.figa@samsung.com> References: <1366731994-7478-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHLMWRmVeSWpSXmKPExsVy+t9jAV2OtWWBBjNa5C3+TjrGbjFp3QEm iwOzH7JanPmta9G74CqbxdmmN+wWmx5fY7WYcX4fk8XaI3fZLU5d/8xmsX7GaxaLzZumMlsc m7GE0WLVrj+MDnwev39NYvT4u+oFs8fOWXfZPe5c28Pm8e7cOXaPzUvqPc7PWMjoceVEE6tH 35ZVjB6fN8kFcEVx2aSk5mSWpRbp2yVwZbyfElBwQrhi/blFzA2M5/i7GDk5JARMJHo39bBD 2GISF+6tZ+ti5OIQEljEKLG7ZyczhNPFJDH7zRIWkCo2ATWJzw2P2EBsEQENiSldj9lBipgF LjFJzN+1iRUkISwQJXHx/HpmEJtFQFVi8ddpYCt4BRwltp9dyAaxTl7i6f0+MJtTwEli59GH YLYQUM3Rv+1MExh5FzAyrGIUTS1ILihOSs810itOzC0uzUvXS87P3cQIDuVn0jsYVzVYHGIU 4GBU4uF9MassUIg1say4MvcQowQHs5IIr/VsoBBvSmJlVWpRfnxRaU5q8SFGaQ4WJXHeg63W gUIC6YklqdmpqQWpRTBZJg5OqQbGwKsSar8r983QT+J6W6gtYfVa+HJ2kH9U/RqBdWFfyvff WWsxl4FZuKTDImZRvCNn8cxndxlTZqhlf/Z/PE2aaV966yR5xY36/oceKao4C/lIrpcRqbkp F9B4dHPqZ4dlUw92uxaKr/7ENP9E+UdH5kjpJe38i80viiWdsLVN9dJstL3Ks16JpTgj0VCL uag4EQBYrUd9YQIAAA== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130423_114726_903422_70EE4AD8 X-CRM114-Status: GOOD ( 10.09 ) X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [203.254.224.33 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, arnd@arndb.de, devicetree-discuss@lists.ozlabs.org, tomasz.figa@gmail.com, kyungmin.park@samsung.com, linux-samsung-soc@vger.kernel.org, john.stultz@linaro.org, ben-linux@fluff.org, olof@lixom.net, thomas.abraham@linaro.org, tglx@linutronix.de, Tomasz Figa , m.szyprowski@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch adds missing documentation describing Device Tree bindings for Samsung PWM timers. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park --- .../devicetree/bindings/pwm/pwm-samsung.txt | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-samsung.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt new file mode 100644 index 0000000..ac67c68 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt @@ -0,0 +1,43 @@ +* Samsung PWM timers + +Samsung SoCs contain PWM timer blocks which can be used for system clock source +and clock event timers, as well as to drive SoC outputs with PWM signal. Each +PWM timer block provides 5 PWM channels (not all of them can drive physical +outputs - see SoC and board manual). + +Be aware that the clocksource driver supports only uniprocessor systems. + +Required properties: +- compatible : should be one of following: + samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs + samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs + samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs + samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210, + Exynos4210 rev0 SoCs + samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210, + Exynos4x12 and Exynos5250 SoCs +- reg: base address and size of register area +- interrupts: list of timer interrupts (one interrupt per timer, starting at + timer 0) +- #pwm-cells: number of cells used for PWM specifier - must be 3 + the specifier format is as follows: + - phandle to PWM controller node + - index of PWM channel (from 0 to 4) + - PWM signal period in nanoseconds + - bitmask of optional PWM flags: + 0x1 - invert PWM signal + +Optional properties: +- samsung,pwm-outputs: list of PWM channels used as PWM outputs on particular + platform - an array of up to 5 elements being indices of PWM channels + (from 0 to 4), the order does not matter. + +Example: + pwm@7f006000 { + compatible = "samsung,s3c6400-pwm"; + reg = <0x7f006000 0x1000>; + interrupt-parent = <&vic0>; + interrupts = <23>, <24>, <25>, <27>, <28>; + samsung,pwm-outputs = <0>, <1>; + #pwm-cells = <3>; + }