From patchwork Thu Apr 25 14:43:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 2488521 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 4E5793FD85 for ; Thu, 25 Apr 2013 14:44:38 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UVNPC-0006Lh-6J; Thu, 25 Apr 2013 14:44:14 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UVNP2-00032S-S8; Thu, 25 Apr 2013 14:44:04 +0000 Received: from co9ehsobe002.messaging.microsoft.com ([207.46.163.25] helo=co9outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UVNOp-000315-1u for linux-arm-kernel@lists.infradead.org; Thu, 25 Apr 2013 14:43:54 +0000 Received: from mail175-co9-R.bigfish.com (10.236.132.233) by CO9EHSOBE003.bigfish.com (10.236.130.66) with Microsoft SMTP Server id 14.1.225.23; Thu, 25 Apr 2013 14:43:47 +0000 Received: from mail175-co9 (localhost [127.0.0.1]) by mail175-co9-R.bigfish.com (Postfix) with ESMTP id B9F00CC00C5; Thu, 25 Apr 2013 14:43:47 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h1fc6h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ahzz8275dhz2dh87h2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1d0ch1155h1151h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail175-co9 (localhost.localdomain [127.0.0.1]) by mail175-co9 (MessageSwitch) id 1366901025636090_12096; Thu, 25 Apr 2013 14:43:45 +0000 (UTC) Received: from CO9EHSMHS024.bigfish.com (unknown [10.236.132.254]) by mail175-co9.bigfish.com (Postfix) with ESMTP id 987FD840048; Thu, 25 Apr 2013 14:43:45 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO9EHSMHS024.bigfish.com (10.236.130.34) with Microsoft SMTP Server (TLS) id 14.1.225.23; Thu, 25 Apr 2013 14:43:43 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.328.11; Thu, 25 Apr 2013 14:43:43 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.128]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r3PEhU1b030381; Thu, 25 Apr 2013 07:43:38 -0700 From: Shawn Guo To: Vinod Koul Subject: [PATCH v2 1/2] dma: imx: change enum definitions to macros Date: Thu, 25 Apr 2013 22:43:27 +0800 Message-ID: <1366901008-7593-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1366901008-7593-1-git-send-email-shawn.guo@linaro.org> References: <1366901008-7593-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130425_104351_325535_C4747BB7 X-CRM114-Status: GOOD ( 12.77 ) X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [207.46.163.25 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Fabio Estevam , Shawn Guo , Arnd Bergmann , kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Change enum sdma_peripheral_type and imx_dma_prio to macro definitions for easing the migration to generic DMA device tree bindings later. Signed-off-by: Shawn Guo --- drivers/dma/imx-sdma.c | 4 +-- include/linux/platform_data/dma-imx.h | 56 +++++++++++++++------------------ 2 files changed, 28 insertions(+), 32 deletions(-) diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 092867b..e57a0c6 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -249,7 +249,7 @@ struct sdma_channel { struct sdma_engine *sdma; unsigned int channel; enum dma_transfer_direction direction; - enum sdma_peripheral_type peripheral_type; + int peripheral_type; unsigned int event_id0; unsigned int event_id1; enum dma_slave_buswidth word_size; @@ -580,7 +580,7 @@ static irqreturn_t sdma_int_handler(int irq, void *dev_id) * sets the pc of SDMA script according to the peripheral type */ static void sdma_get_pc(struct sdma_channel *sdmac, - enum sdma_peripheral_type peripheral_type) + int peripheral_type) { struct sdma_engine *sdma = sdmac->sdma; int per_2_emi = 0, emi_2_per = 0; diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h index f6d30cc..8a8a684 100644 --- a/include/linux/platform_data/dma-imx.h +++ b/include/linux/platform_data/dma-imx.h @@ -16,40 +16,36 @@ /* * This enumerates peripheral types. Used for SDMA. */ -enum sdma_peripheral_type { - IMX_DMATYPE_SSI, /* MCU domain SSI */ - IMX_DMATYPE_SSI_SP, /* Shared SSI */ - IMX_DMATYPE_MMC, /* MMC */ - IMX_DMATYPE_SDHC, /* SDHC */ - IMX_DMATYPE_UART, /* MCU domain UART */ - IMX_DMATYPE_UART_SP, /* Shared UART */ - IMX_DMATYPE_FIRI, /* FIRI */ - IMX_DMATYPE_CSPI, /* MCU domain CSPI */ - IMX_DMATYPE_CSPI_SP, /* Shared CSPI */ - IMX_DMATYPE_SIM, /* SIM */ - IMX_DMATYPE_ATA, /* ATA */ - IMX_DMATYPE_CCM, /* CCM */ - IMX_DMATYPE_EXT, /* External peripheral */ - IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */ - IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */ - IMX_DMATYPE_DSP, /* DSP */ - IMX_DMATYPE_MEMORY, /* Memory */ - IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */ - IMX_DMATYPE_SPDIF, /* SPDIF */ - IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */ - IMX_DMATYPE_ASRC, /* ASRC */ - IMX_DMATYPE_ESAI, /* ESAI */ -}; +#define IMX_DMATYPE_SSI 0 /* MCU domain SSI */ +#define IMX_DMATYPE_SSI_SP 1 /* Shared SSI */ +#define IMX_DMATYPE_MMC 2 /* MMC */ +#define IMX_DMATYPE_SDHC 3 /* SDHC */ +#define IMX_DMATYPE_UART 4 /* MCU domain UART */ +#define IMX_DMATYPE_UART_SP 5 /* Shared UART */ +#define IMX_DMATYPE_FIRI 6 /* FIRI */ +#define IMX_DMATYPE_CSPI 7 /* MCU domain CSPI */ +#define IMX_DMATYPE_CSPI_SP 8 /* Shared CSPI */ +#define IMX_DMATYPE_SIM 9 /* SIM */ +#define IMX_DMATYPE_ATA 10 /* ATA */ +#define IMX_DMATYPE_CCM 11 /* CCM */ +#define IMX_DMATYPE_EXT 12 /* External peripheral */ +#define IMX_DMATYPE_MSHC 13 /* Memory Stick Host Controller */ +#define IMX_DMATYPE_MSHC_SP 14 /* Shared Memory Stick Host Controller */ +#define IMX_DMATYPE_DSP 15 /* DSP */ +#define IMX_DMATYPE_MEMORY 16 /* Memory */ +#define IMX_DMATYPE_FIFO_MEMORY 17 /* FIFO type Memory */ +#define IMX_DMATYPE_SPDIF 18 /* SPDIF */ +#define IMX_DMATYPE_IPU_MEMORY 19 /* IPU Memory */ +#define IMX_DMATYPE_ASRC 20 /* ASRC */ +#define IMX_DMATYPE_ESAI 21 /* ESAI */ -enum imx_dma_prio { - DMA_PRIO_HIGH = 0, - DMA_PRIO_MEDIUM = 1, - DMA_PRIO_LOW = 2 -}; +#define DMA_PRIO_HIGH 0 +#define DMA_PRIO_MEDIUM 1 +#define DMA_PRIO_LOW 2 struct imx_dma_data { int dma_request; /* DMA request line */ - enum sdma_peripheral_type peripheral_type; + int peripheral_type; int priority; };