From patchwork Thu Apr 25 14:43:28 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 2488531 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 424813FD85 for ; Thu, 25 Apr 2013 14:45:13 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UVNPT-0006PK-Sq; Thu, 25 Apr 2013 14:44:33 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UVNPB-00033C-B9; Thu, 25 Apr 2013 14:44:13 +0000 Received: from co9ehsobe002.messaging.microsoft.com ([207.46.163.25] helo=co9outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UVNOp-00030y-0u for linux-arm-kernel@lists.infradead.org; Thu, 25 Apr 2013 14:43:56 +0000 Received: from mail114-co9-R.bigfish.com (10.236.132.254) by CO9EHSOBE019.bigfish.com (10.236.130.82) with Microsoft SMTP Server id 14.1.225.23; Thu, 25 Apr 2013 14:43:49 +0000 Received: from mail114-co9 (localhost [127.0.0.1]) by mail114-co9-R.bigfish.com (Postfix) with ESMTP id 4DD3A240101; Thu, 25 Apr 2013 14:43:49 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 5 X-BigFish: VS5(z1039mzzz1f42h1fc6h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ahzz8275dhz2dh87h2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1d0ch1155h1151h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail114-co9 (localhost.localdomain [127.0.0.1]) by mail114-co9 (MessageSwitch) id 136690102640936_21217; Thu, 25 Apr 2013 14:43:46 +0000 (UTC) Received: from CO9EHSMHS023.bigfish.com (unknown [10.236.132.228]) by mail114-co9.bigfish.com (Postfix) with ESMTP id 0754020009E; Thu, 25 Apr 2013 14:43:46 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO9EHSMHS023.bigfish.com (10.236.130.33) with Microsoft SMTP Server (TLS) id 14.1.225.23; Thu, 25 Apr 2013 14:43:44 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.2.328.11; Thu, 25 Apr 2013 14:43:43 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.128]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r3PEhU1c030381; Thu, 25 Apr 2013 07:43:41 -0700 From: Shawn Guo To: Vinod Koul Subject: [PATCH v2 2/2] dma: imx-sdma: move to generic device tree bindings Date: Thu, 25 Apr 2013 22:43:28 +0800 Message-ID: <1366901008-7593-3-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1366901008-7593-1-git-send-email-shawn.guo@linaro.org> References: <1366901008-7593-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130425_104351_584400_8B58ED4B X-CRM114-Status: GOOD ( 17.67 ) X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [207.46.163.25 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Fabio Estevam , Shawn Guo , Arnd Bergmann , kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Update imx-sdma driver to adopt generic DMA device tree bindings. It calls of_dma_controller_register() with imx-sdma specific of_dma_xlate to get the generic DMA device tree helper support. The #dma-cells for imx-sdma must be 3, which includes request ID, peripheral type and priority. The definitions of peripheral type and priority get moved into include/dt-bindings/dma/imx.h, so that the macros can also be used in dts files. The existing way of requesting channel, clients directly call dma_request_channel(), still work there, and will be removed after all imx-sdma clients get converted to generic DMA device tree helper. Signed-off-by: Shawn Guo --- .../devicetree/bindings/dma/fsl-imx-sdma.txt | 22 +++++++++++ drivers/dma/imx-sdma.c | 40 ++++++++++++++++++++ include/dt-bindings/dma/imx.h | 29 ++++++++++++++ include/linux/platform_data/dma-imx.h | 31 +-------------- 4 files changed, 92 insertions(+), 30 deletions(-) create mode 100644 include/dt-bindings/dma/imx.h diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt index d1e3f44..8bd8d35 100644 --- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt +++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt @@ -4,6 +4,11 @@ Required properties: - compatible : Should be "fsl,-sdma" - reg : Should contain SDMA registers location and length - interrupts : Should contain SDMA interrupt +- #dma-cells : Must be <3>. + The first cell specifies the DMA request/event ID. The second and + third cell specifies the peripheral type and priority of DMA transfer + respectively. Refer to include/dt-bindings/dma/imx.h for available + peripheral types and priorities. - fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM scripts firmware @@ -13,5 +18,22 @@ sdma@83fb0000 { compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; reg = <0x83fb0000 0x4000>; interrupts = <6>; + #dma-cells = <3>; fsl,sdma-ram-script-name = "sdma-imx51.bin"; }; + +DMA clients connected to the i.MX SDMA controller must use the format +described in the dma.txt file. + +Examples: + +ssi2: ssi@70014000 { + compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; + reg = <0x70014000 0x4000>; + interrupts = <30>; + clocks = <&clks 49>; + dmas = <&sdma 24 IMX_DMATYPE_SSI_SP DMA_PRIO_HIGH>, + <&sdma 25 IMX_DMATYPE_SSI_SP DMA_PRIO_HIGH>; + dma-names = "rx", "tx"; + fsl,fifo-depth = <15>; +}; diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index e57a0c6..f1324da 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include @@ -1296,6 +1297,35 @@ err_dma_alloc: return ret; } +static bool sdma_filter_fn(struct dma_chan *chan, void *fn_param) +{ + struct imx_dma_data *data = fn_param; + + if (!imx_dma_is_general_purpose(chan)) + return false; + + chan->private = data; + + return true; +} + +struct dma_chan *sdma_xlate(struct of_phandle_args *dma_spec, + struct of_dma *ofdma) +{ + struct sdma_engine *sdma = ofdma->of_dma_data; + dma_cap_mask_t mask = sdma->dma_device.cap_mask; + struct imx_dma_data data; + + if (dma_spec->args_count != 3) + return NULL; + + data.dma_request = dma_spec->args[0]; + data.peripheral_type = dma_spec->args[1]; + data.priority = dma_spec->args[2]; + + return dma_request_channel(mask, sdma_filter_fn, &data); +} + static int __init sdma_probe(struct platform_device *pdev) { const struct of_device_id *of_id = @@ -1443,10 +1473,20 @@ static int __init sdma_probe(struct platform_device *pdev) goto err_init; } + if (np) { + ret = of_dma_controller_register(np, sdma_xlate, sdma); + if (ret) { + dev_err(&pdev->dev, "failed to register controller\n"); + goto err_register; + } + } + dev_info(sdma->dev, "initialized\n"); return 0; +err_register: + dma_async_device_unregister(&sdma->dma_device); err_init: kfree(sdma->script_addrs); err_alloc: diff --git a/include/dt-bindings/dma/imx.h b/include/dt-bindings/dma/imx.h new file mode 100644 index 0000000..d5de68c --- /dev/null +++ b/include/dt-bindings/dma/imx.h @@ -0,0 +1,29 @@ +/* + * This enumerates peripheral types. Used for SDMA. + */ +#define IMX_DMATYPE_SSI 0 /* MCU domain SSI */ +#define IMX_DMATYPE_SSI_SP 1 /* Shared SSI */ +#define IMX_DMATYPE_MMC 2 /* MMC */ +#define IMX_DMATYPE_SDHC 3 /* SDHC */ +#define IMX_DMATYPE_UART 4 /* MCU domain UART */ +#define IMX_DMATYPE_UART_SP 5 /* Shared UART */ +#define IMX_DMATYPE_FIRI 6 /* FIRI */ +#define IMX_DMATYPE_CSPI 7 /* MCU domain CSPI */ +#define IMX_DMATYPE_CSPI_SP 8 /* Shared CSPI */ +#define IMX_DMATYPE_SIM 9 /* SIM */ +#define IMX_DMATYPE_ATA 10 /* ATA */ +#define IMX_DMATYPE_CCM 11 /* CCM */ +#define IMX_DMATYPE_EXT 12 /* External peripheral */ +#define IMX_DMATYPE_MSHC 13 /* Memory Stick Host Controller */ +#define IMX_DMATYPE_MSHC_SP 14 /* Shared Memory Stick Host Controller */ +#define IMX_DMATYPE_DSP 15 /* DSP */ +#define IMX_DMATYPE_MEMORY 16 /* Memory */ +#define IMX_DMATYPE_FIFO_MEMORY 17 /* FIFO type Memory */ +#define IMX_DMATYPE_SPDIF 18 /* SPDIF */ +#define IMX_DMATYPE_IPU_MEMORY 19 /* IPU Memory */ +#define IMX_DMATYPE_ASRC 20 /* ASRC */ +#define IMX_DMATYPE_ESAI 21 /* ESAI */ + +#define DMA_PRIO_HIGH 0 +#define DMA_PRIO_MEDIUM 1 +#define DMA_PRIO_LOW 2 diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h index 8a8a684..33f7eda 100644 --- a/include/linux/platform_data/dma-imx.h +++ b/include/linux/platform_data/dma-imx.h @@ -12,36 +12,7 @@ #include #include #include - -/* - * This enumerates peripheral types. Used for SDMA. - */ -#define IMX_DMATYPE_SSI 0 /* MCU domain SSI */ -#define IMX_DMATYPE_SSI_SP 1 /* Shared SSI */ -#define IMX_DMATYPE_MMC 2 /* MMC */ -#define IMX_DMATYPE_SDHC 3 /* SDHC */ -#define IMX_DMATYPE_UART 4 /* MCU domain UART */ -#define IMX_DMATYPE_UART_SP 5 /* Shared UART */ -#define IMX_DMATYPE_FIRI 6 /* FIRI */ -#define IMX_DMATYPE_CSPI 7 /* MCU domain CSPI */ -#define IMX_DMATYPE_CSPI_SP 8 /* Shared CSPI */ -#define IMX_DMATYPE_SIM 9 /* SIM */ -#define IMX_DMATYPE_ATA 10 /* ATA */ -#define IMX_DMATYPE_CCM 11 /* CCM */ -#define IMX_DMATYPE_EXT 12 /* External peripheral */ -#define IMX_DMATYPE_MSHC 13 /* Memory Stick Host Controller */ -#define IMX_DMATYPE_MSHC_SP 14 /* Shared Memory Stick Host Controller */ -#define IMX_DMATYPE_DSP 15 /* DSP */ -#define IMX_DMATYPE_MEMORY 16 /* Memory */ -#define IMX_DMATYPE_FIFO_MEMORY 17 /* FIFO type Memory */ -#define IMX_DMATYPE_SPDIF 18 /* SPDIF */ -#define IMX_DMATYPE_IPU_MEMORY 19 /* IPU Memory */ -#define IMX_DMATYPE_ASRC 20 /* ASRC */ -#define IMX_DMATYPE_ESAI 21 /* ESAI */ - -#define DMA_PRIO_HIGH 0 -#define DMA_PRIO_MEDIUM 1 -#define DMA_PRIO_LOW 2 +#include struct imx_dma_data { int dma_request; /* DMA request line */