From patchwork Fri Apr 26 13:27:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 2493861 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 3868BDF230 for ; Fri, 26 Apr 2013 13:28:16 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UVihC-0000lA-FH; Fri, 26 Apr 2013 13:28:14 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UVih9-00045f-Hs; Fri, 26 Apr 2013 13:28:11 +0000 Received: from mail-pd0-f176.google.com ([209.85.192.176]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UVih6-00045L-Mk for linux-arm-kernel@lists.infradead.org; Fri, 26 Apr 2013 13:28:09 +0000 Received: by mail-pd0-f176.google.com with SMTP id r10so212198pdi.7 for ; Fri, 26 Apr 2013 06:28:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state; bh=lZOr3WorK2fhFBRCIhHhMhSnkcxaOI4zmUlpLpg8+zY=; b=B7Nu11x3NJDS5FGHHCG+l1wIotIqXVszXbdKUF93pc7w/C3DWU7Ig+F38oLDHL5Ixo WqyR+0+DXKXrdSVdEdDJTIVMEhYpTMXlQoYzWxScuBmuNyvSHKCnooSqmSxYuopiL7Z8 kDcqsATHfJlByD0IkkAwdZXcfVfl4KaluH+qP2uxmG+8JOSsXEt5E1NCz02a9/Zhz1VS U18ldNgOw3StoFf+QeDF3wRYgnAishM8f7h3rHGQbpU4k+0a3X+9I3tO2vZTyfUKTBOO M8XYFnMdH7O/Q3hNVjj02jmQiPvD8kjEgDHLJH8061jMJXoWUZny8G+GHIykpL6maBDT Duqg== X-Received: by 10.66.138.109 with SMTP id qp13mr30771632pab.127.1366982885467; Fri, 26 Apr 2013 06:28:05 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.72.18.82]) by mx.google.com with ESMTPSA id ba10sm11724970pbd.21.2013.04.26.06.28.02 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 26 Apr 2013 06:28:04 -0700 (PDT) From: Anup Patel To: kvmarm@lists.cs.columbia.edu Subject: [PATCH V3] ARM: KVM: Allow host virtual timer irq number to be different from guest virtual timer irq number Date: Fri, 26 Apr 2013 18:57:27 +0530 Message-Id: <1366982847-11028-1-git-send-email-anup.patel@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQkZsBJDXhJpZ0CrDd55kRZSM80SmqVJQ15YWZDXcEWFzkAGdAldMVdR05LjYospqi64ftH/ X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130426_092808_960569_9AA685A3 X-CRM114-Status: GOOD ( 19.32 ) X-Spam-Score: 0.6 (/) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (0.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [209.85.192.176 listed in list.dnswl.org] 2.5 SUSPICIOUS_RECIPS Similar addresses in recipient list -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: marc.zyngier@arm.com, linaro-kernel@lists.linaro.org, Anup Patel , linux-arm-kernel@lists.infradead.org, Pranavkumar Sawargaonkar X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The arch_timer irq numbers (or PPI number) are implementation dependent so, the host virtual timer irq number can be different from guest virtual timer irq number. This patch ensures that host virtual timer irq number is read from DTB and guest virtual timer irq is determined based on guest vcpu target type. Signed-off-by: Anup Patel Signed-off-by: Pranavkumar Sawargaonkar --- arch/arm/include/asm/kvm_arch_timer.h | 7 +++++++ arch/arm/include/asm/kvm_host.h | 1 + arch/arm/kvm/arch_timer.c | 32 +++++++++++++++++++++++++------- arch/arm/kvm/guest.c | 15 +++++++++++++++ arch/arm/kvm/reset.c | 4 +++- 5 files changed, 51 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/kvm_arch_timer.h b/arch/arm/include/asm/kvm_arch_timer.h index 68cb9e1..c5c135b 100644 --- a/arch/arm/include/asm/kvm_arch_timer.h +++ b/arch/arm/include/asm/kvm_arch_timer.h @@ -61,6 +61,7 @@ struct arch_timer_cpu { #ifdef CONFIG_KVM_ARM_TIMER int kvm_timer_hyp_init(void); int kvm_timer_init(struct kvm *kvm); +int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu); void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu); void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu); void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu); @@ -76,7 +77,13 @@ static inline int kvm_timer_init(struct kvm *kvm) return 0; } +static int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu) +{ + return 0; +} + static inline void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) {} + static inline void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) {} static inline void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu) {} static inline void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu) {} diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h index 57cb786..cdc0551 100644 --- a/arch/arm/include/asm/kvm_host.h +++ b/arch/arm/include/asm/kvm_host.h @@ -43,6 +43,7 @@ struct kvm_vcpu; u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode); int kvm_target_cpu(void); +struct kvm_irq_level *kvm_target_timer_irq(struct kvm_vcpu *vcpu); int kvm_reset_vcpu(struct kvm_vcpu *vcpu); void kvm_reset_coprocs(struct kvm_vcpu *vcpu); diff --git a/arch/arm/kvm/arch_timer.c b/arch/arm/kvm/arch_timer.c index 49a7516..e558115 100644 --- a/arch/arm/kvm/arch_timer.c +++ b/arch/arm/kvm/arch_timer.c @@ -30,7 +30,7 @@ static struct timecounter *timecounter; static struct workqueue_struct *wqueue; -static struct kvm_irq_level timer_irq = { +static struct kvm_irq_level host_timer_irq = { .level = 1, }; @@ -67,8 +67,8 @@ static void kvm_timer_inject_irq(struct kvm_vcpu *vcpu) timer->cntv_ctl |= ARCH_TIMER_CTRL_IT_MASK; kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id, - vcpu->arch.timer_cpu.irq->irq, - vcpu->arch.timer_cpu.irq->level); + timer->irq->irq, + timer->irq->level); } static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id) @@ -156,6 +156,24 @@ void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu) timer_arm(timer, ns); } +int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu) +{ + struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; + + /* + * The vcpu timer irq number cannot be determined in + * kvm_timer_vcpu_init() because it is called much before + * kvm_vcpu_set_target(). To handle this, we determine + * vcpu timer irq number when the vcpu is resetted. + */ + timer->irq = kvm_target_timer_irq(vcpu); + if (!timer->irq) { + return -ENODEV; + } + + return 0; +} + void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) { struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; @@ -163,12 +181,12 @@ void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) INIT_WORK(&timer->expired, kvm_timer_inject_irq_work); hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); timer->timer.function = kvm_timer_expire; - timer->irq = &timer_irq; + timer->irq = NULL; } static void kvm_timer_init_interrupt(void *info) { - enable_percpu_irq(timer_irq.irq, 0); + enable_percpu_irq(host_timer_irq.irq, 0); } @@ -182,7 +200,7 @@ static int kvm_timer_cpu_notify(struct notifier_block *self, break; case CPU_DYING: case CPU_DYING_FROZEN: - disable_percpu_irq(timer_irq.irq); + disable_percpu_irq(host_timer_irq.irq); break; } @@ -230,7 +248,7 @@ int kvm_timer_hyp_init(void) goto out; } - timer_irq.irq = ppi; + host_timer_irq.irq = ppi; err = register_cpu_notifier(&kvm_timer_cpu_nb); if (err) { diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c index 152d036..6fbc988 100644 --- a/arch/arm/kvm/guest.c +++ b/arch/arm/kvm/guest.c @@ -36,6 +36,11 @@ struct kvm_stats_debugfs_item debugfs_entries[] = { { NULL } }; +static struct kvm_irq_level target_cortex_a15_timer_irq = { + .irq = 27, + .level = 1, +}; + int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) { return 0; @@ -197,6 +202,16 @@ int __attribute_const__ kvm_target_cpu(void) } } +struct kvm_irq_level *kvm_target_timer_irq(struct kvm_vcpu *vcpu) +{ + switch (vcpu->arch.target) { + case KVM_ARM_TARGET_CORTEX_A15: + return &target_cortex_a15_timer_irq; + default: + return NULL; + }; +} + int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, const struct kvm_vcpu_init *init) { diff --git a/arch/arm/kvm/reset.c b/arch/arm/kvm/reset.c index b80256b..655e567 100644 --- a/arch/arm/kvm/reset.c +++ b/arch/arm/kvm/reset.c @@ -26,6 +26,7 @@ #include #include #include +#include /****************************************************************************** * Cortex-A15 Reset Values @@ -70,5 +71,6 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) /* Reset CP15 registers */ kvm_reset_coprocs(vcpu); - return 0; + /* Reset arch_timer context */ + return kvm_timer_vcpu_reset(vcpu); }