From patchwork Tue Apr 30 06:34:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 2503431 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id D917CDF5B1 for ; Tue, 30 Apr 2013 06:42:40 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UX4Gt-0008VK-Cn; Tue, 30 Apr 2013 06:42:39 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UX4Gq-0003bV-Ho; Tue, 30 Apr 2013 06:42:36 +0000 Received: from mail-pa0-f46.google.com ([209.85.220.46]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UX4Gn-0003aH-KA for linux-arm-kernel@lists.infradead.org; Tue, 30 Apr 2013 06:42:34 +0000 Received: by mail-pa0-f46.google.com with SMTP id ld11so178612pab.33 for ; Mon, 29 Apr 2013 23:42:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state; bh=xR3JGwckMFOyp2egufHe0mksWxt0jiISFyFP9rlGMbs=; b=TTQ0XEg76rink31qUsV6JVoO64wD64rL5Th5C14XUFnBHDFfdDYHlhe9962VA2iil8 4UVGYjTBiNieQz8p24I1tSqJ76aeW9gqobXD2wrcCqQ9Ejq0fOYZMDmW8mBVTYXstmnQ mkNtggWE9SLZwCyAKCe+ARvZCrZ/2O3QbucuHhJjIYhY/iq+91N51d7WPZErJT3FDY6A sOvf/eOKurySFDomJDNh0bbAHTxI9tu/5VZgBClYABKpCr9hk6mQJPgDU7yWkFCugzTD gpSqI8ux9OOoc5UYY+IKYO8I4OJOxZ+iTBkkZ46tAMbnDDe6HnIqnLURiKP5ryaLWUsl VbLw== X-Received: by 10.66.242.166 with SMTP id wr6mr3578110pac.59.1367303723947; Mon, 29 Apr 2013 23:35:23 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.72.18.82]) by mx.google.com with ESMTPSA id z8sm27214534pbt.23.2013.04.29.23.35.20 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 29 Apr 2013 23:35:23 -0700 (PDT) From: Anup Patel To: kvmarm@lists.cs.columbia.edu Subject: [PATCH V3] arm64: KVM: Reset arch_timer upon vcpu reset Date: Tue, 30 Apr 2013 12:04:49 +0530 Message-Id: <1367303689-8049-1-git-send-email-anup.patel@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQmceuVXmRLmSlsq0Wfv2QF6bPmO0Vc6FaaL7hgLbXb3xHHSyE+qtlJjnWerN7/77nAYgU7m X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130430_024233_745168_87B704DB X-CRM114-Status: GOOD ( 12.42 ) X-Spam-Score: -0.1 (/) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.46 listed in list.dnswl.org] 2.5 SUSPICIOUS_RECIPS Similar addresses in recipient list -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: marc.zyngier@arm.com, linaro-kernel@lists.linaro.org, Anup Patel , linux-arm-kernel@lists.infradead.org, Pranavkumar Sawargaonkar X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Reset the arch_timer on vcpu reset and configure guest virtual timer irq in the process. Signed-off-by: Anup Patel Signed-off-by: Pranavkumar Sawargaonkar --- arch/arm64/include/asm/kvm_arch_timer.h | 2 ++ arch/arm64/kvm/reset.c | 11 +++++++++++ 2 files changed, 13 insertions(+) diff --git a/arch/arm64/include/asm/kvm_arch_timer.h b/arch/arm64/include/asm/kvm_arch_timer.h index eb02273..0f36603 100644 --- a/arch/arm64/include/asm/kvm_arch_timer.h +++ b/arch/arm64/include/asm/kvm_arch_timer.h @@ -50,6 +50,8 @@ struct arch_timer_cpu { int kvm_timer_hyp_init(void); int kvm_timer_init(struct kvm *kvm); +void kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu, + const struct kvm_irq_level *irq); void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu); void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu); void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu); diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c index 64e0740..7c9cebc 100644 --- a/arch/arm64/kvm/reset.c +++ b/arch/arm64/kvm/reset.c @@ -27,6 +27,7 @@ #include #include #include +#include /* * ARMv8 Reset Values @@ -40,6 +41,11 @@ static struct kvm_regs default_regs_reset32 = { COMPAT_PSR_I_BIT | COMPAT_PSR_F_BIT), }; +static const struct kvm_irq_level default_vtimer_irq = { + .irq = 27, + .level = 1, +}; + static bool cpu_has_32bit_el1(void) { u64 pfr0; @@ -75,6 +81,7 @@ int kvm_arch_dev_ioctl_check_extension(long ext) int kvm_reset_vcpu(struct kvm_vcpu *vcpu) { struct kvm_regs *cpu_reset; + const struct kvm_irq_level *cpu_vtimer_irq; switch (vcpu->arch.target) { default: @@ -86,6 +93,7 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) } else { cpu_reset = &default_regs_reset; } + cpu_vtimer_irq = &default_vtimer_irq; break; } @@ -95,5 +103,8 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) /* Reset system registers */ kvm_reset_sys_regs(vcpu); + /* Reset arch_timer context */ + kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq); + return 0; }