diff mbox

[1/5] ARM: socfpga: dts: Add ethernet bindings for SOCFPGA

Message ID 1368571955-6652-1-git-send-email-dinguyen@altera.com (mailing list archive)
State New, archived
Headers show

Commit Message

Dinh Nguyen May 14, 2013, 10:52 p.m. UTC
From: Dinh Nguyen <dinguyen@altera.com>

Add entry for 2nd GMAC controller. Add the correct clocks for the GMAC.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Olof Johansson <olof@lixom.net>
CC: Pavel Machek <pavel@denx.de>
CC: <linux@arm.linux.org.uk>
---
 arch/arm/boot/dts/socfpga.dtsi         |   16 ++++++++++++++--
 arch/arm/boot/dts/socfpga_cyclone5.dts |   16 ++++++++++++++++
 arch/arm/boot/dts/socfpga_vt.dts       |    8 ++++++++
 3 files changed, 38 insertions(+), 2 deletions(-)

Comments

Pavel Machek May 15, 2013, 12:43 p.m. UTC | #1
On Tue 2013-05-14 17:52:31, dinguyen@altera.com wrote:
> From: Dinh Nguyen <dinguyen@altera.com>
> 
> Add entry for 2nd GMAC controller. Add the correct clocks for the GMAC.
> 
> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
> CC: Arnd Bergmann <arnd@arndb.de>
> CC: Olof Johansson <olof@lixom.net>
> CC: Pavel Machek <pavel@denx.de>
> CC: <linux@arm.linux.org.uk>

Looks good.

Reviewed-by: Pavel Machek <pavel@denx.de>

...but, this patch is not enough to get ethernet to work with
3.10-rc1, right? I hoped that applying 1-3 of the series would get me
ethernet, but no :-(.

Thanks,
									Pavel
Arnd Bergmann May 15, 2013, 1:19 p.m. UTC | #2
On Wednesday 15 May 2013, dinguyen@altera.com wrote:
>                 };
>  
> +               ethernet@ff700000 {
> +                       phy-mode = "gmii";
> +               };
> +
> +               ethernet@ff702000 {
> +                       status = "disabled";
> +               };

By convention, please mark the controllers as "disabled" in the main .dtsi file
and only enable them in the board specific files when used, rather than the
other way round.

	Arnd
Dinh Nguyen May 15, 2013, 4:44 p.m. UTC | #3
Hi Pavel,

Thanks for the review...

On 05/15/2013 07:43 AM, Pavel Machek wrote:
> On Tue 2013-05-14 17:52:31, dinguyen@altera.com wrote:
>> From: Dinh Nguyen <dinguyen@altera.com>
>>
>> Add entry for 2nd GMAC controller. Add the correct clocks for the GMAC.
>>
>> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
>> CC: Arnd Bergmann <arnd@arndb.de>
>> CC: Olof Johansson <olof@lixom.net>
>> CC: Pavel Machek <pavel@denx.de>
>> CC: <linux@arm.linux.org.uk>
> 
> Looks good.
> 
> Reviewed-by: Pavel Machek <pavel@denx.de>
> 
> ...but, this patch is not enough to get ethernet to work with
> 3.10-rc1, right? I hoped that applying 1-3 of the series would get me
> ethernet, but no :-(.

Yes, this fixes a build error for socfpga_defconfig in 3.10-rc1. I'll
send a patch to enable ethernet after these patches are accepted.

Dinh


> 
> Thanks,
> 									Pavel
>
Dinh Nguyen May 15, 2013, 4:44 p.m. UTC | #4
Hi Arnd,

On 05/15/2013 08:19 AM, Arnd Bergmann wrote:
> On Wednesday 15 May 2013, dinguyen@altera.com wrote:
>>                 };
>>  
>> +               ethernet@ff700000 {
>> +                       phy-mode = "gmii";
>> +               };
>> +
>> +               ethernet@ff702000 {
>> +                       status = "disabled";
>> +               };
> 
> By convention, please mark the controllers as "disabled" in the main .dtsi file
> and only enable them in the board specific files when used, rather than the
> other way round.

Thanks for the review. Will fix.

Dinh
> 
> 	Arnd
>
diff mbox

Patch

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 16a6e13..c42f835 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -23,6 +23,7 @@ 
 
 	aliases {
 		ethernet0 = &gmac0;
+		ethernet1 = &gmac1;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		timer0 = &timer0;
@@ -238,13 +239,24 @@ 
 				};
 			};
 
-		gmac0: stmmac@ff700000 {
+		gmac0: ethernet@ff700000 {
 			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
 			reg = <0xff700000 0x2000>;
 			interrupts = <0 115 4>;
 			interrupt-names = "macirq";
 			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
-			phy-mode = "gmii";
+			clocks = <&emac0_clk>;
+			clock-names = "stmmaceth";
+		};
+
+		gmac1: ethernet@ff702000 {
+			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
+			reg = <0xff702000 0x2000>;
+			interrupts = <0 120 4>;
+			interrupt-names = "macirq";
+			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
+			clocks = <&emac1_clk>;
+			clock-names = "stmmaceth";
 		};
 
 		L2: l2-cache@fffef000 {
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
index 2495958..ece1a87 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dts
@@ -32,6 +32,13 @@ 
 		reg = <0x0 0x40000000>; /* 1GB */
 	};
 
+	aliases {
+		/* this allow the ethaddr uboot environmnet variable contents
+		 * to be added to the gmac1 device tree blob.
+		 */
+		ethernet0 = &gmac1;
+	};
+
 	soc {
 		clkmgr@ffd04000 {
 			clocks {
@@ -41,6 +48,15 @@ 
 			};
 		};
 
+		ethernet@ff700000 {
+			status = "disabled";
+		};
+
+		ethernet@ff702000 {
+			phy-mode = "rgmii";
+			phy-addr = <0xffffffff>; /* probe for phy addr */
+		};
+
 		timer0@ffc08000 {
 			clock-frequency = <100000000>;
 		};
diff --git a/arch/arm/boot/dts/socfpga_vt.dts b/arch/arm/boot/dts/socfpga_vt.dts
index 0bf035d..f728471 100644
--- a/arch/arm/boot/dts/socfpga_vt.dts
+++ b/arch/arm/boot/dts/socfpga_vt.dts
@@ -41,6 +41,14 @@ 
 			};
 		};
 
+		ethernet@ff700000 {
+			phy-mode = "gmii";
+		};
+
+		ethernet@ff702000 {
+			status = "disabled";
+		};
+
 		timer0@ffc08000 {
 			clock-frequency = <7000000>;
 		};