Message ID | 1368611522-9984-2-git-send-email-lee.jones@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Wed, May 15, 2013 at 11:51 AM, Lee Jones <lee.jones@linaro.org> wrote: > During the initial setup of a logical channel, it is necessary to unmask > the GIM in order to receive generated terminal count and error interrupts. > We're separating out this required code so it will be possible to move > the remaining code in d40_phy_cfg(), which is mostly runtime configuration > into the runtime_config() routine. > > Cc: Vinod Koul <vinod.koul@intel.com> > Cc: Dan Williams <djbw@fb.com> > Cc: Per Forlin <per.forlin@stericsson.com> > Cc: Rabin Vincent <rabin@rab.in> > Acked-by: Arnd Bergmann <arnd@arndb.de> > Signed-off-by: Lee Jones <lee.jones@linaro.org> Tentatively applied to my ux500-dma40 branch. This lacks an ACK from Vinod... I cannot get any of this stack of patches up to ARM SoC before I have Vinod's ACK on all hitting drivers/dma/* Yours, Linus Walleij
On Wed, May 15, 2013 at 06:29:51PM +0200, Linus Walleij wrote: > On Wed, May 15, 2013 at 11:51 AM, Lee Jones <lee.jones@linaro.org> wrote: > > > During the initial setup of a logical channel, it is necessary to unmask > > the GIM in order to receive generated terminal count and error interrupts. > > We're separating out this required code so it will be possible to move > > the remaining code in d40_phy_cfg(), which is mostly runtime configuration > > into the runtime_config() routine. > > > > Cc: Vinod Koul <vinod.koul@intel.com> > > Cc: Dan Williams <djbw@fb.com> > > Cc: Per Forlin <per.forlin@stericsson.com> > > Cc: Rabin Vincent <rabin@rab.in> > > Acked-by: Arnd Bergmann <arnd@arndb.de> > > Signed-off-by: Lee Jones <lee.jones@linaro.org> > > Tentatively applied to my ux500-dma40 branch. > > This lacks an ACK from Vinod... Acked-by: Vinod Koul <vinod.koul@intel.com> > > I cannot get any of this stack of patches up to ARM SoC > before I have Vinod's ACK on all hitting drivers/dma/* Wip ... :) > > Yours, > Linus Walleij
On Thu, 16 May 2013, Vinod Koul wrote: > On Wed, May 15, 2013 at 06:29:51PM +0200, Linus Walleij wrote: > > On Wed, May 15, 2013 at 11:51 AM, Lee Jones <lee.jones@linaro.org> wrote: > > > > > During the initial setup of a logical channel, it is necessary to unmask > > > the GIM in order to receive generated terminal count and error interrupts. > > > We're separating out this required code so it will be possible to move > > > the remaining code in d40_phy_cfg(), which is mostly runtime configuration > > > into the runtime_config() routine. > > > > > > Cc: Vinod Koul <vinod.koul@intel.com> > > > Cc: Dan Williams <djbw@fb.com> > > > Cc: Per Forlin <per.forlin@stericsson.com> > > > Cc: Rabin Vincent <rabin@rab.in> > > > Acked-by: Arnd Bergmann <arnd@arndb.de> > > > Signed-off-by: Lee Jones <lee.jones@linaro.org> > > > > Tentatively applied to my ux500-dma40 branch. > > > > This lacks an ACK from Vinod... > Acked-by: Vinod Koul <vinod.koul@intel.com> > > > > I cannot get any of this stack of patches up to ARM SoC > > before I have Vinod's ACK on all hitting drivers/dma/* > Wip ... :) Nice! :)
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index 5e9f6d6..759293e 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -2513,6 +2513,10 @@ static int d40_alloc_chan_resources(struct dma_chan *chan) d40c->lcpa = d40c->base->lcpa_base + d40c->dma_cfg.dev_type * D40_LCPA_CHAN_SIZE + D40_LCPA_CHAN_DST_DELTA; + + /* Unmask the Global Interrupt Mask. */ + d40c->src_def_cfg |= BIT(D40_SREG_CFG_LOG_GIM_POS); + d40c->dst_def_cfg |= BIT(D40_SREG_CFG_LOG_GIM_POS); } dev_dbg(chan2dev(d40c), "allocated %s channel (phy %d%s)\n", diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c index 5eb6c10..435a223 100644 --- a/drivers/dma/ste_dma40_ll.c +++ b/drivers/dma/ste_dma40_ll.c @@ -107,11 +107,6 @@ void d40_phy_cfg(struct stedma40_chan_cfg *cfg, src |= 1 << D40_SREG_CFG_PRI_POS; dst |= 1 << D40_SREG_CFG_PRI_POS; } - - } else { - /* Logical channel */ - dst |= 1 << D40_SREG_CFG_LOG_GIM_POS; - src |= 1 << D40_SREG_CFG_LOG_GIM_POS; } if (cfg->src_info.big_endian)