diff mbox

pinctrl: sirf: save the status in suspend and restore after resuming

Message ID 1368674229-11813-1-git-send-email-Baohua.Song@csr.com (mailing list archive)
State New, archived
Headers show

Commit Message

Barry Song May 16, 2013, 3:17 a.m. UTC
this patch saves the status of pinctrl registers and restore them while
resuming. this makes all drivers have coherent status for pinmux after
suspending and resuming.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
---
 drivers/pinctrl/sirf/pinctrl-sirf.c | 56 +++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

Comments

Linus Walleij May 20, 2013, 8:16 a.m. UTC | #1
On Thu, May 16, 2013 at 5:17 AM, Barry Song <Baohua.Song@csr.com> wrote:

> this patch saves the status of pinctrl registers and restore them while
> resuming. this makes all drivers have coherent status for pinmux after
> suspending and resuming.
>
> Signed-off-by: Barry Song <Baohua.Song@csr.com>

Applied, but a quick remark that you may want to fix up:

(...)

> +#ifdef CONFIG_PM_SLEEP
> +static int sirfsoc_pinmux_suspend_noirq(struct device *dev)
> +{
> +       int i, j;
> +       struct sirfsoc_pmx *spmx = dev_get_drvdata(dev);
> +
> +       for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
> +               for (j = 0; j < SIRFSOC_GPIO_BANK_SIZE; j++) {
> +                       spmx->gpio_regs[i][j] = readl(spmx->gpio_virtbase +
> +                               SIRFSOC_GPIO_CTRL(i, j));
> +               }
> +               spmx->ints_regs[i] = readl(spmx->gpio_virtbase +
> +                       SIRFSOC_GPIO_INT_STATUS(i));
> +               spmx->paden_regs[i] = readl(spmx->gpio_virtbase +
> +                       SIRFSOC_GPIO_PAD_EN(i));
> +       }
> +       spmx->dspen_regs = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_DSP_EN0);
> +
> +       for (i = 0; i < 3; i++)

Why are you hard-coding 3 here? It looks fragile.

> +               spmx->rsc_regs[i] = readl(spmx->rsc_virtbase + 4 * i);
> +
> +       return 0;
> +}
> +
> +static int sirfsoc_pinmux_resume_noirq(struct device *dev)
> +{
> +       int i, j;
> +       struct sirfsoc_pmx *spmx = dev_get_drvdata(dev);
> +
> +       for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
> +               for (j = 0; j < SIRFSOC_GPIO_BANK_SIZE; j++) {
> +                       writel(spmx->gpio_regs[i][j], spmx->gpio_virtbase +
> +                               SIRFSOC_GPIO_CTRL(i, j));
> +               }
> +               writel(spmx->ints_regs[i], spmx->gpio_virtbase +
> +                       SIRFSOC_GPIO_INT_STATUS(i));
> +               writel(spmx->paden_regs[i], spmx->gpio_virtbase +
> +                       SIRFSOC_GPIO_PAD_EN(i));
> +       }
> +       writel(spmx->dspen_regs, spmx->gpio_virtbase + SIRFSOC_GPIO_DSP_EN0);
> +
> +       for (i = 0; i < 3; i++)

Dito.

Yours,
Linus Walleij
Barry Song May 22, 2013, 4:28 p.m. UTC | #2
2013/5/20 Linus Walleij <linus.walleij@linaro.org>:
> On Thu, May 16, 2013 at 5:17 AM, Barry Song <Baohua.Song@csr.com> wrote:
>
>> this patch saves the status of pinctrl registers and restore them while
>> resuming. this makes all drivers have coherent status for pinmux after
>> suspending and resuming.
>>
>> Signed-off-by: Barry Song <Baohua.Song@csr.com>
>
> Applied, but a quick remark that you may want to fix up:

thanks, linus. i will have an incremental patch to fix it.

>
> (...)
>
>> +#ifdef CONFIG_PM_SLEEP
>> +static int sirfsoc_pinmux_suspend_noirq(struct device *dev)
>> +{
>> +       int i, j;
>> +       struct sirfsoc_pmx *spmx = dev_get_drvdata(dev);
>> +
>> +       for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
>> +               for (j = 0; j < SIRFSOC_GPIO_BANK_SIZE; j++) {
>> +                       spmx->gpio_regs[i][j] = readl(spmx->gpio_virtbase +
>> +                               SIRFSOC_GPIO_CTRL(i, j));
>> +               }
>> +               spmx->ints_regs[i] = readl(spmx->gpio_virtbase +
>> +                       SIRFSOC_GPIO_INT_STATUS(i));
>> +               spmx->paden_regs[i] = readl(spmx->gpio_virtbase +
>> +                       SIRFSOC_GPIO_PAD_EN(i));
>> +       }
>> +       spmx->dspen_regs = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_DSP_EN0);
>> +
>> +       for (i = 0; i < 3; i++)
>
> Why are you hard-coding 3 here? It looks fragile.

that means i have 3 registers beginning from spmx->rsc_virtbase to
save and restore. i missed to check the name of everyone.

>
>> +               spmx->rsc_regs[i] = readl(spmx->rsc_virtbase + 4 * i);
>> +ery
>> +       return 0;
>> +}
>> +
>> +static int sirfsoc_pinmux_resume_noirq(struct device *dev)
>> +{
>> +       int i, j;
>> +       struct sirfsoc_pmx *spmx = dev_get_drvdata(dev);
>> +
>> +       for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
>> +               for (j = 0; j < SIRFSOC_GPIO_BANK_SIZE; j++) {
>> +                       writel(spmx->gpio_regs[i][j], spmx->gpio_virtbase +
>> +                               SIRFSOC_GPIO_CTRL(i, j));
>> +               }
>> +               writel(spmx->ints_regs[i], spmx->gpio_virtbase +
>> +                       SIRFSOC_GPIO_INT_STATUS(i));
>> +               writel(spmx->paden_regs[i], spmx->gpio_virtbase +
>> +                       SIRFSOC_GPIO_PAD_EN(i));
>> +       }
>> +       writel(spmx->dspen_regs, spmx->gpio_virtbase + SIRFSOC_GPIO_DSP_EN0);
>> +
>> +       for (i = 0; i < 3; i++)
>
> Dito.
>
> Yours,
> Linus Walleij
>

-barry
diff mbox

Patch

diff --git a/drivers/pinctrl/sirf/pinctrl-sirf.c b/drivers/pinctrl/sirf/pinctrl-sirf.c
index b4727db..0677e19 100644
--- a/drivers/pinctrl/sirf/pinctrl-sirf.c
+++ b/drivers/pinctrl/sirf/pinctrl-sirf.c
@@ -390,11 +390,67 @@  out_no_rsc_remap:
 	return ret;
 }
 
+#ifdef CONFIG_PM_SLEEP
+static int sirfsoc_pinmux_suspend_noirq(struct device *dev)
+{
+	int i, j;
+	struct sirfsoc_pmx *spmx = dev_get_drvdata(dev);
+
+	for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
+		for (j = 0; j < SIRFSOC_GPIO_BANK_SIZE; j++) {
+			spmx->gpio_regs[i][j] = readl(spmx->gpio_virtbase +
+				SIRFSOC_GPIO_CTRL(i, j));
+		}
+		spmx->ints_regs[i] = readl(spmx->gpio_virtbase +
+			SIRFSOC_GPIO_INT_STATUS(i));
+		spmx->paden_regs[i] = readl(spmx->gpio_virtbase +
+			SIRFSOC_GPIO_PAD_EN(i));
+	}
+	spmx->dspen_regs = readl(spmx->gpio_virtbase + SIRFSOC_GPIO_DSP_EN0);
+
+	for (i = 0; i < 3; i++)
+		spmx->rsc_regs[i] = readl(spmx->rsc_virtbase + 4 * i);
+
+	return 0;
+}
+
+static int sirfsoc_pinmux_resume_noirq(struct device *dev)
+{
+	int i, j;
+	struct sirfsoc_pmx *spmx = dev_get_drvdata(dev);
+
+	for (i = 0; i < SIRFSOC_GPIO_NO_OF_BANKS; i++) {
+		for (j = 0; j < SIRFSOC_GPIO_BANK_SIZE; j++) {
+			writel(spmx->gpio_regs[i][j], spmx->gpio_virtbase +
+				SIRFSOC_GPIO_CTRL(i, j));
+		}
+		writel(spmx->ints_regs[i], spmx->gpio_virtbase +
+			SIRFSOC_GPIO_INT_STATUS(i));
+		writel(spmx->paden_regs[i], spmx->gpio_virtbase +
+			SIRFSOC_GPIO_PAD_EN(i));
+	}
+	writel(spmx->dspen_regs, spmx->gpio_virtbase + SIRFSOC_GPIO_DSP_EN0);
+
+	for (i = 0; i < 3; i++)
+		writel(spmx->rsc_regs[i], spmx->rsc_virtbase + 4 * i);
+
+	return 0;
+}
+
+static const struct dev_pm_ops sirfsoc_pinmux_pm_ops = {
+	.suspend_noirq = sirfsoc_pinmux_suspend_noirq,
+	.resume_noirq = sirfsoc_pinmux_resume_noirq,
+};
+#endif
+
 static struct platform_driver sirfsoc_pinmux_driver = {
 	.driver = {
 		.name = DRIVER_NAME,
 		.owner = THIS_MODULE,
 		.of_match_table = pinmux_ids,
+#ifdef CONFIG_PM_SLEEP
+		.pm = &sirfsoc_pinmux_pm_ops,
+#endif
 	},
 	.probe = sirfsoc_pinmux_probe,
 };