From patchwork Thu May 23 13:30:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 2606991 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 024B53FDBC for ; Thu, 23 May 2013 13:33:05 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UfVcf-00062h-Qd; Thu, 23 May 2013 13:32:03 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UfVcO-00054k-Ut; Thu, 23 May 2013 13:31:44 +0000 Received: from mail.free-electrons.com ([94.23.35.102]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UfVc0-00050i-Eb for linux-arm-kernel@lists.infradead.org; Thu, 23 May 2013 13:31:22 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id A108A775; Thu, 23 May 2013 15:31:00 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 0BA7D742; Thu, 23 May 2013 15:31:00 +0200 (CEST) From: Thomas Petazzoni To: Andrew Lunn , Jason Cooper , Gregory Clement Subject: [PATCH v2 2/6] arm: mvebu: avoid hardcoded virtual address in coherency code Date: Thu, 23 May 2013 15:30:50 +0200 Message-Id: <1369315854-32724-3-git-send-email-thomas.petazzoni@free-electrons.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1369315854-32724-1-git-send-email-thomas.petazzoni@free-electrons.com> References: <1369315854-32724-1-git-send-email-thomas.petazzoni@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130523_093120_772612_567C46D4 X-CRM114-Status: GOOD ( 15.51 ) X-Spam-Score: -3.0 (---) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-3.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.1 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Lior Amsalem , Arnd Bergmann , Maen Suleiman , Ezequiel Garcia , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Now that the coherency_get_cpu_count() function no longer requires a very early mapping of the coherency unit registers, we can avoid the hardcoded virtual address in coherency.c. However, the coherency features are still used quite early, so we need to do the of_iomap() early enough, at the ->init_timer() level, so we have the call of coherency_init() at this point. Unfortunately, at ->init_timer() time, it is not possible to register a bus notifier, so we add a separate coherency_late_init() function that gets called as as postcore_initcall(), when bus notifiers are available. Signed-off-by: Thomas Petazzoni --- arch/arm/mach-mvebu/armada-370-xp.c | 2 +- arch/arm/mach-mvebu/coherency.c | 20 ++++++++++---------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c index cf8e357..b9319c4 100644 --- a/arch/arm/mach-mvebu/armada-370-xp.c +++ b/arch/arm/mach-mvebu/armada-370-xp.c @@ -46,6 +46,7 @@ static void __init armada_370_xp_timer_and_clk_init(void) { mvebu_clocks_init(); armada_370_xp_timer_init(); + coherency_init(); } static void __init armada_370_xp_init_early(void) @@ -75,7 +76,6 @@ static void __init armada_370_xp_init_early(void) static void __init armada_370_xp_dt_init(void) { of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); - coherency_init(); } static const char * const armada_370_xp_dt_compat[] = { diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c index 46d66c0..d74794a 100644 --- a/arch/arm/mach-mvebu/coherency.c +++ b/arch/arm/mach-mvebu/coherency.c @@ -27,14 +27,7 @@ #include #include "armada-370-xp.h" -/* - * Some functions in this file are called very early during SMP - * initialization. At that time the device tree framework is not yet - * ready, and it is not possible to get the register address to - * ioremap it. That's why the pointer below is given with an initial - * value matching its virtual mapping - */ -static void __iomem *coherency_base = ARMADA_370_XP_REGS_VIRT_BASE + 0x20200; +static void __iomem *coherency_base; static void __iomem *coherency_cpu_base; /* Coherency fabric registers */ @@ -135,9 +128,16 @@ int __init coherency_init(void) coherency_base = of_iomap(np, 0); coherency_cpu_base = of_iomap(np, 1); set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); - bus_register_notifier(&platform_bus_type, - &mvebu_hwcc_platform_nb); } return 0; } + +static int __init coherency_late_init(void) +{ + bus_register_notifier(&platform_bus_type, + &mvebu_hwcc_platform_nb); + return 0; +} + +postcore_initcall(coherency_late_init);