From patchwork Sat May 25 01:12:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 2612801 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 143C6DF24C for ; Sat, 25 May 2013 01:12:45 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ug32G-0008Uo-EW; Sat, 25 May 2013 01:12:40 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ug32D-0002Zs-TD; Sat, 25 May 2013 01:12:37 +0000 Received: from mail-pb0-f51.google.com ([209.85.160.51]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ug32A-0002ZP-6k for linux-arm-kernel@lists.infradead.org; Sat, 25 May 2013 01:12:35 +0000 Received: by mail-pb0-f51.google.com with SMTP id jt11so4826551pbb.38 for ; Fri, 24 May 2013 18:12:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer :x-gm-message-state; bh=/+/8/clZ3OsfkQnuDZVUGmBi+2BZHQ/HDtsnbI3FNSs=; b=n1kXTAb9qd2F4yVp9m3xDG/E2wxCD6PkN+oW55h4/NwTfExn1AznwX7oaDO+NRjoGI wWKyP5TbxWUwTBGLayfm5dSE9NwirSGngM9+xMQnwBAOlSP0neG3WeDrtJggi5rjRsmz B7iKks2gwQ4jFPY4tBEz5U6q+fe+RAQhF59AssOXlJm8B1Y1gUcFInyX+jBlUmKRPt6H 1JCWeOIZ/TjLzMbJ82geu8iutJMZ+vwZUs+KL2LlOa9ZMWgGP68V6QK4EZ9KjCWOkiKB 3bxecfg47qXGTLesasLqQV3Xdk7NyuEkNpnooKiJUDjAJU+D6aifG1nrMfNEP/ALvfmi UbxQ== X-Received: by 10.68.92.165 with SMTP id cn5mr20460183pbb.50.1369444327618; Fri, 24 May 2013 18:12:07 -0700 (PDT) Received: from localhost.localdomain (c-67-169-183-77.hsd1.ca.comcast.net. [67.169.183.77]) by mx.google.com with ESMTPSA id gi2sm18267815pbb.2.2013.05.24.18.12.06 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 24 May 2013 18:12:06 -0700 (PDT) From: Christoffer Dall To: linux-arm-kernel@lists.infradead.org Subject: [v2] ARM: mm: Get rid of L_PTE_USER ref from PAGE_S2_DEVICE Date: Fri, 24 May 2013 18:12:00 -0700 Message-Id: <1369444320-28893-1-git-send-email-cdall@cs.columbia.edu> X-Mailer: git-send-email 1.7.9.5 X-Gm-Message-State: ALoCoQm71B7vGMnLtSuSNOKOxYMYJd8GB3aI79TxiVjUFx5BIks018gdV/NzYlbIocDbqm2tT2ui X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130524_211234_336499_0DDD2A68 X-CRM114-Status: UNSURE ( 8.69 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.160.51 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Marc Zyngier , Christoffer Dall , kvmarm@lists.cs.columbia.edu X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org THe L_PTE_USER actually has nothing to do with stage 2 mappings and the L_PTE_S2_RDWR value sets the readable bit, which was what L_PTE_USER was used for before proper handling of stage 2 memory defines. Changelog: [v2]: Change default mappings to be r/w instead of r/o, as per Marc Zyngier's suggestion. Cc: Marc Zyngier Signed-off-by: Christoffer Dall --- arch/arm/include/asm/pgtable.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h index 9bcd262..8afc60c 100644 --- a/arch/arm/include/asm/pgtable.h +++ b/arch/arm/include/asm/pgtable.h @@ -97,7 +97,7 @@ extern pgprot_t pgprot_s2_device; #define PAGE_HYP _MOD_PROT(pgprot_kernel, L_PTE_HYP) #define PAGE_HYP_DEVICE _MOD_PROT(pgprot_hyp_device, L_PTE_HYP) #define PAGE_S2 _MOD_PROT(pgprot_s2, L_PTE_S2_RDONLY) -#define PAGE_S2_DEVICE _MOD_PROT(pgprot_s2_device, L_PTE_USER | L_PTE_S2_RDONLY) +#define PAGE_S2_DEVICE _MOD_PROT(pgprot_s2_device, L_PTE_S2_RDWR) #define __PAGE_NONE __pgprot(_L_PTE_DEFAULT | L_PTE_RDONLY | L_PTE_XN | L_PTE_NONE) #define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | L_PTE_USER | L_PTE_XN)