From patchwork Sun May 26 13:05:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 2615421 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id 5217ADFB79 for ; Sun, 26 May 2013 13:07:32 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UgaeZ-000352-UA; Sun, 26 May 2013 13:06:28 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ugae9-0004xS-JD; Sun, 26 May 2013 13:06:01 +0000 Received: from kirsty.vergenet.net ([202.4.237.240]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ugadn-0004sy-FO for linux-arm-kernel@lists.infradead.org; Sun, 26 May 2013 13:05:42 +0000 Received: from vergenet.net (182-166-251-27f1.hyg1.eonet.ne.jp [182.166.251.27]) by kirsty.vergenet.net (Postfix) with ESMTP id 901FF26715D; Sun, 26 May 2013 23:05:20 +1000 (EST) Received: by vergenet.net (Postfix, from userid 7100) id 5C4B47C1B21; Sun, 26 May 2013 22:06:01 +0900 (JST) From: Simon Horman To: Arnd Bergmann , Olof Johansson Subject: [PATCH 3/6] ARM: shmobile: r8a73a4: add div4 clocks Date: Sun, 26 May 2013 22:05:54 +0900 Message-Id: <1369573557-11071-4-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1369573557-11071-1-git-send-email-horms+renesas@verge.net.au> References: <1369573557-11071-1-git-send-email-horms+renesas@verge.net.au> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130526_090540_120501_43C533F5 X-CRM114-Status: GOOD ( 14.03 ) X-Spam-Score: -3.7 (---) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-3.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [202.4.237.240 listed in list.dnswl.org] -1.1 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Kuninori Morimoto , linux-sh@vger.kernel.org, Magnus Damm , arm@kernel.org, Simon Horman , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Kuninori Morimoto DIV4 clocks control each core clocks. Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/clock-r8a73a4.c | 45 ++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c b/arch/arm/mach-shmobile/clock-r8a73a4.c index 2be592f..147314a 100644 --- a/arch/arm/mach-shmobile/clock-r8a73a4.c +++ b/arch/arm/mach-shmobile/clock-r8a73a4.c @@ -32,6 +32,8 @@ #define SMSTPCR2 0xe6150138 #define SMSTPCR5 0xe6150144 +#define FRQCRA 0xE6150000 +#define FRQCRB 0xE6150004 #define CKSCR 0xE61500C0 #define PLLECR 0xE61500D0 #define PLL1CR 0xE6150028 @@ -175,6 +177,46 @@ static struct clk *main_clks[] = { &pll2h_clk, }; +/* DIV4 */ +static void div4_kick(struct clk *clk) +{ + unsigned long value; + + /* set KICK bit in FRQCRB to update hardware setting */ + value = ioread32(CPG_MAP(FRQCRB)); + value |= (1 << 31); + iowrite32(value, CPG_MAP(FRQCRB)); +} + +static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, 24, 0, 36, 48, 10}; + +static struct clk_div_mult_table div4_div_mult_table = { + .divisors = divisors, + .nr_divisors = ARRAY_SIZE(divisors), +}; + +static struct clk_div4_table div4_table = { + .div_mult_table = &div4_div_mult_table, + .kick = div4_kick, +}; + +enum { + DIV4_I, DIV4_M3, DIV4_B, DIV4_M1, DIV4_M2, + DIV4_ZX, DIV4_ZS, DIV4_HP, + DIV4_NR }; + +static struct clk div4_clks[DIV4_NR] = { + [DIV4_I] = SH_CLK_DIV4(&pll1_clk, FRQCRA, 20, 0x0dff, CLK_ENABLE_ON_INIT), + [DIV4_M3] = SH_CLK_DIV4(&pll1_clk, FRQCRA, 12, 0x1dff, CLK_ENABLE_ON_INIT), + [DIV4_B] = SH_CLK_DIV4(&pll1_clk, FRQCRA, 8, 0x0dff, CLK_ENABLE_ON_INIT), + [DIV4_M1] = SH_CLK_DIV4(&pll1_clk, FRQCRA, 4, 0x1dff, 0), + [DIV4_M2] = SH_CLK_DIV4(&pll1_clk, FRQCRA, 0, 0x1dff, 0), + [DIV4_ZX] = SH_CLK_DIV4(&pll1_clk, FRQCRB, 12, 0x0dff, 0), + [DIV4_ZS] = SH_CLK_DIV4(&pll1_clk, FRQCRB, 8, 0x0dff, 0), + [DIV4_HP] = SH_CLK_DIV4(&pll1_clk, FRQCRB, 4, 0x0dff, 0), +}; + +/* MSTP */ enum { MSTP217, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP522, @@ -258,6 +300,9 @@ void __init r8a73a4_clock_init(void) ret = clk_register(main_clks[k]); if (!ret) + ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); + + if (!ret) ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); clkdev_add_table(lookups, ARRAY_SIZE(lookups));