From patchwork Wed May 29 19:44:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 2632491 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork2.kernel.org (Postfix) with ESMTP id D65F5DF24C for ; Wed, 29 May 2013 19:46:30 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UhmKG-0003vB-N7; Wed, 29 May 2013 19:46:25 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UhmKE-0006f1-0k; Wed, 29 May 2013 19:46:22 +0000 Received: from co1ehsobe006.messaging.microsoft.com ([216.32.180.189] helo=co1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UhmKA-0006dj-9n for linux-arm-kernel@lists.infradead.org; Wed, 29 May 2013 19:46:19 +0000 Received: from mail134-co1-R.bigfish.com (10.243.78.239) by CO1EHSOBE027.bigfish.com (10.243.66.90) with Microsoft SMTP Server id 14.1.225.23; Wed, 29 May 2013 19:45:56 +0000 Received: from mail134-co1 (localhost [127.0.0.1]) by mail134-co1-R.bigfish.com (Postfix) with ESMTP id 031DDA6009D; Wed, 29 May 2013 19:45:56 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ah1fc6hzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1d0ch1d2eh1d3fh1dc1h1dfeh1dffh1155h) Received: from mail134-co1 (localhost.localdomain [127.0.0.1]) by mail134-co1 (MessageSwitch) id 1369856691451946_27727; Wed, 29 May 2013 19:44:51 +0000 (UTC) Received: from CO1EHSMHS009.bigfish.com (unknown [10.243.78.235]) by mail134-co1.bigfish.com (Postfix) with ESMTP id 6104AD4006F; Wed, 29 May 2013 19:44:51 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS009.bigfish.com (10.243.66.19) with Microsoft SMTP Server (TLS) id 14.1.225.23; Wed, 29 May 2013 19:44:47 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.2.328.11; Wed, 29 May 2013 19:45:45 +0000 Received: from fabio-Latitude-E6410.am.freescale.net ([10.29.244.74]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r4TJijE4030606; Wed, 29 May 2013 12:44:46 -0700 From: Fabio Estevam To: Subject: [PATCH 1/2] ARM: mxs: Print silicon version on boot Date: Wed, 29 May 2013 16:44:22 -0300 Message-ID: <1369856663-29314-1-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.8.1.2 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130529_154618_490278_D11A4213 X-CRM114-Status: GOOD ( 12.88 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.180.189 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Fabio Estevam , linux-arm-kernel@lists.infradead.org, kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Introduce functions that identify the SoC type (i.MX23 or iMX28) and also report the silicon revision. Signed-off-by: Fabio Estevam --- arch/arm/mach-mxs/mach-mxs.c | 85 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c index 66fe810..b632323 100644 --- a/arch/arm/mach-mxs/mach-mxs.c +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -38,6 +38,21 @@ #define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0 0x2 #define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR1 0x3 + +#define MXS_DIGCTL_BASE_ADDR 0x8001c000 +#define HW_DIGCTL_CHIPID 0x310 +#define HW_DIGCTL_CHIPID_MASK (0xffff << 16) +#define HW_DIGCTL_REV_MASK 0xff +#define HW_DIGCTL_CHIPID_MX23 (0x3780 << 16) +#define HW_DIGCTL_CHIPID_MX28 (0x2800 << 16) + +#define IMX_CHIP_REVISION_1_0 0x10 +#define IMX_CHIP_REVISION_1_1 0x11 +#define IMX_CHIP_REVISION_1_2 0x12 +#define IMX_CHIP_REVISION_1_3 0x13 +#define IMX_CHIP_REVISION_1_4 0x14 +#define IMX_CHIP_REV_UNKNOWN 0xff + #define MXS_GPIO_NR(bank, nr) ((bank) * 32 + (nr)) #define MXS_SET_ADDR 0x4 @@ -361,8 +376,78 @@ static void __init cfa10037_init(void) update_fec_mac_prop(OUI_CRYSTALFONTZ); } +static const char *mxs_get_cpu_type(void) +{ + int reg; + void __iomem *digctl_base = ioremap(MXS_DIGCTL_BASE_ADDR, SZ_8K); + + if (!digctl_base) + return "unknown"; + + reg = readl(digctl_base + HW_DIGCTL_CHIPID) & HW_DIGCTL_CHIPID_MASK; + switch (reg) { + case HW_DIGCTL_CHIPID_MX23: + return "23"; + case HW_DIGCTL_CHIPID_MX28: + return "28"; + default: + return "unknown"; + } +} + +static int mxs_get_cpu_rev(void) +{ + int reg, rev; + void __iomem *digctl_base = ioremap(MXS_DIGCTL_BASE_ADDR, SZ_8K); + + if (!digctl_base) + return -ENOMEM; + + reg = readl(digctl_base + HW_DIGCTL_CHIPID) & HW_DIGCTL_CHIPID_MASK; + rev = readl(digctl_base + HW_DIGCTL_CHIPID) & HW_DIGCTL_REV_MASK; + + switch (reg) { + case HW_DIGCTL_CHIPID_MX23: + switch (rev) { + case 0x0: + return IMX_CHIP_REVISION_1_0; + case 0x1: + return IMX_CHIP_REVISION_1_1; + case 0x2: + return IMX_CHIP_REVISION_1_2; + case 0x3: + return IMX_CHIP_REVISION_1_3; + case 0x4: + return IMX_CHIP_REVISION_1_4; + default: + return IMX_CHIP_REV_UNKNOWN; + } + case HW_DIGCTL_CHIPID_MX28: + switch (rev) { + case 0x1: + return IMX_CHIP_REVISION_1_2; + default: + return IMX_CHIP_REV_UNKNOWN; + } + default: + return IMX_CHIP_REV_UNKNOWN; + } +} + +static void mxs_print_silicon_rev(const char *cpu, int srev) +{ + if (srev == IMX_CHIP_REV_UNKNOWN) + pr_info("CPU identified as i.MX%s, unknown revision\n", cpu); + else + pr_info("CPU identified as i.MX%s, silicon rev %d.%d\n", + cpu, (srev >> 4) & 0xf, srev & 0xf); +} + static void __init mxs_machine_init(void) { + + mxs_print_silicon_rev(mxs_get_cpu_type(), mxs_get_cpu_rev()); + if (of_machine_is_compatible("fsl,imx28-evk")) imx28_evk_init(); else if (of_machine_is_compatible("bluegiga,apx4devkit"))