| Message ID | 1369930103-11963-4-git-send-email-ludovic.desroches@atmel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 30/05/2013 18:08, ludovic.desroches@atmel.com : > From: Ludovic Desroches <ludovic.desroches@atmel.com> > > For most devices the FIFO configuration is the same i.e. when half FIFO size is > available/filled, a source/destination request is serviced. But USART devices > have to do it when there is enough space/data available to perform a single > AHB access so the ASAP configuration. > > Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> > Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Clear and neat: thanks Ludo. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> > --- > .../devicetree/bindings/dma/atmel-dma.txt | 7 ++++-- > drivers/dma/at_hdmac.c | 25 ++++++++++++++++++---- > 2 files changed, 26 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt b/Documentation/devicetree/bindings/dma/atmel-dma.txt > index c80e8a3..c280a0e 100644 > --- a/Documentation/devicetree/bindings/dma/atmel-dma.txt > +++ b/Documentation/devicetree/bindings/dma/atmel-dma.txt > @@ -24,8 +24,11 @@ The three cells in order are: > 1. A phandle pointing to the DMA controller. > 2. The memory interface (16 most significant bits), the peripheral interface > (16 less significant bits). > -3. The peripheral identifier for the hardware handshaking interface. The > -identifier can be different for tx and rx. > +3. Parameters for the at91 DMA configuration register which are device > +dependant: > + - bit 7-0: peripheral identifier for the hardware handshaking interface. The > + identifier can be different for tx and rx. > + - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP. > > Example: > > diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c > index e923cda..bfd73e1 100644 > --- a/drivers/dma/at_hdmac.c > +++ b/drivers/dma/at_hdmac.c > @@ -14,6 +14,7 @@ > * found on AT91SAM9263. > */ > > +#include <dt-bindings/dma/at91.h> > #include <linux/clk.h> > #include <linux/dmaengine.h> > #include <linux/dma-mapping.h> > @@ -1223,14 +1224,30 @@ static struct dma_chan *at_dma_xlate(struct of_phandle_args *dma_spec, > atslave = devm_kzalloc(&dmac_pdev->dev, sizeof(*atslave), GFP_KERNEL); > if (!atslave) > return NULL; > + > + atslave->cfg = ATC_DST_H2SEL_HW | ATC_SRC_H2SEL_HW; > /* > * We can fill both SRC_PER and DST_PER, one of these fields will be > * ignored depending on DMA transfer direction. > */ > - per_id = dma_spec->args[1]; > - atslave->cfg = ATC_FIFOCFG_HALFFIFO | ATC_DST_H2SEL_HW > - | ATC_SRC_H2SEL_HW | ATC_DST_PER(per_id) > - | ATC_SRC_PER(per_id); > + per_id = dma_spec->args[1] & AT91_DMA_CFG_PER_ID_MASK; > + atslave->cfg |= ATC_DST_PER(per_id) | ATC_SRC_PER(per_id); > + /* > + * We have to translate the value we get from the device tree since > + * the half FIFO configuration value had to be 0 to keep backward > + * compatibility. > + */ > + switch(dma_spec->args[1] & AT91_DMA_CFG_FIFOCFG_MASK) { > + case AT91_DMA_CFG_FIFOCFG_ALAP: > + atslave->cfg |= ATC_FIFOCFG_LARGESTBURST; > + break; > + case AT91_DMA_CFG_FIFOCFG_ASAP: > + atslave->cfg |= ATC_FIFOCFG_ENOUGHSPACE; > + break; > + case AT91_DMA_CFG_FIFOCFG_HALF: > + default: > + atslave->cfg |= ATC_FIFOCFG_HALFFIFO; > + } > atslave->dma_dev = &dmac_pdev->dev; > > chan = dma_request_channel(mask, at_dma_filter, atslave); >
On 18:32 Thu 30 May , Nicolas Ferre wrote: > On 30/05/2013 18:08, ludovic.desroches@atmel.com : > >From: Ludovic Desroches <ludovic.desroches@atmel.com> > > > >For most devices the FIFO configuration is the same i.e. when half FIFO size is > >available/filled, a source/destination request is serviced. But USART devices > >have to do it when there is enough space/data available to perform a single > >AHB access so the ASAP configuration. > > > >Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> > >Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> > > Clear and neat: thanks Ludo. agreed can we apply this via AT91 as this depends on some cleanup I did on DT and could result on some nigthmware conflict Best Regards, J.
On Thu, May 30, 2013 at 06:39:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote: > On 18:32 Thu 30 May , Nicolas Ferre wrote: > > On 30/05/2013 18:08, ludovic.desroches@atmel.com : > > >From: Ludovic Desroches <ludovic.desroches@atmel.com> > > > > > >For most devices the FIFO configuration is the same i.e. when half FIFO size is > > >available/filled, a source/destination request is serviced. But USART devices > > >have to do it when there is enough space/data available to perform a single > > >AHB access so the ASAP configuration. > > > > > >Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> > > >Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> > > > > Clear and neat: thanks Ludo. > > agreed > > can we apply this via AT91 as this depends on some cleanup I did on DT and > could result on some nigthmware conflict > In fact, I am not sure it's the best solution. I have noticed that there is a conflict with a patch sent by Nicolas (dmaengine: at_hdmac: extend hardware handshaking interface identification) which is already in Vinod's tree but which is not present on Jean-Christophe's cleanup tree on which I based these patches. Moreover this patch doesn't use macros introduced by Nicolas' patch. I may update it and it should go through Vinod's tree with a dependence on patch 1/3. What's your point of view?
On 31/05/2013 11:16, Ludovic Desroches : > On Thu, May 30, 2013 at 06:39:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote: >> On 18:32 Thu 30 May , Nicolas Ferre wrote: >>> On 30/05/2013 18:08, ludovic.desroches@atmel.com : >>>> From: Ludovic Desroches <ludovic.desroches@atmel.com> >>>> >>>> For most devices the FIFO configuration is the same i.e. when half FIFO size is >>>> available/filled, a source/destination request is serviced. But USART devices >>>> have to do it when there is enough space/data available to perform a single >>>> AHB access so the ASAP configuration. >>>> >>>> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> >>>> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> >>> >>> Clear and neat: thanks Ludo. >> >> agreed >> >> can we apply this via AT91 as this depends on some cleanup I did on DT and >> could result on some nigthmware conflict >> > > In fact, I am not sure it's the best solution. I have noticed that there is a > conflict with a patch sent by Nicolas (dmaengine: at_hdmac: extend hardware > handshaking interface identification) which is already in Vinod's tree but > which is not present on Jean-Christophe's cleanup tree on which I based these > patches. > > Moreover this patch doesn't use macros introduced by Nicolas' patch. I may > update it and it should go through Vinod's tree with a dependence on patch 1/3. > > What's your point of view? Indeed. Another option could be to push patches 1 and 3 in dmaengine's tree and make the 2nd patch go through arm-soc with a dependency on slave-dma GIT tree (it seems it is an usual patern). Arnd, Jean-Christophe, what do you think? Bye,
On 11:31 Fri 31 May , Nicolas Ferre wrote: > On 31/05/2013 11:16, Ludovic Desroches : > >On Thu, May 30, 2013 at 06:39:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote: > >>On 18:32 Thu 30 May , Nicolas Ferre wrote: > >>>On 30/05/2013 18:08, ludovic.desroches@atmel.com : > >>>>From: Ludovic Desroches <ludovic.desroches@atmel.com> > >>>> > >>>>For most devices the FIFO configuration is the same i.e. when half FIFO size is > >>>>available/filled, a source/destination request is serviced. But USART devices > >>>>have to do it when there is enough space/data available to perform a single > >>>>AHB access so the ASAP configuration. > >>>> > >>>>Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> > >>>>Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> > >>> > >>>Clear and neat: thanks Ludo. > >> > >>agreed > >> > >>can we apply this via AT91 as this depends on some cleanup I did on DT and > >>could result on some nigthmware conflict > >> > > > >In fact, I am not sure it's the best solution. I have noticed that there is a > >conflict with a patch sent by Nicolas (dmaengine: at_hdmac: extend hardware > >handshaking interface identification) which is already in Vinod's tree but > >which is not present on Jean-Christophe's cleanup tree on which I based these > >patches. > > > >Moreover this patch doesn't use macros introduced by Nicolas' patch. I may > >update it and it should go through Vinod's tree with a dependence on patch 1/3. > > > >What's your point of view? > > Indeed. Another option could be to push patches 1 and 3 in > dmaengine's tree and make the 2nd patch go through arm-soc with a > dependency on slave-dma GIT tree (it seems it is an usual patern). > > Arnd, Jean-Christophe, what do you think? Nico I let you handle this one my only concern is that the cleanup work can cause nightware conflict Best Regards, J. > > Bye, > -- > Nicolas Ferre
On Fri, May 31, 2013 at 2:31 AM, Nicolas Ferre <nicolas.ferre@atmel.com> wrote: > On 31/05/2013 11:16, Ludovic Desroches : >> >> On Thu, May 30, 2013 at 06:39:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD >> wrote: >>> >>> On 18:32 Thu 30 May , Nicolas Ferre wrote: >>>> >>>> On 30/05/2013 18:08, ludovic.desroches@atmel.com : >>>>> >>>>> From: Ludovic Desroches <ludovic.desroches@atmel.com> >>>>> >>>>> For most devices the FIFO configuration is the same i.e. when half FIFO >>>>> size is >>>>> available/filled, a source/destination request is serviced. But USART >>>>> devices >>>>> have to do it when there is enough space/data available to perform a >>>>> single >>>>> AHB access so the ASAP configuration. >>>>> >>>>> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> >>>>> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> >>>> >>>> >>>> Clear and neat: thanks Ludo. >>> >>> >>> agreed >>> >>> can we apply this via AT91 as this depends on some cleanup I did on DT >>> and >>> could result on some nigthmware conflict >>> >> >> In fact, I am not sure it's the best solution. I have noticed that there >> is a >> conflict with a patch sent by Nicolas (dmaengine: at_hdmac: extend >> hardware >> handshaking interface identification) which is already in Vinod's tree but >> which is not present on Jean-Christophe's cleanup tree on which I based >> these >> patches. >> >> Moreover this patch doesn't use macros introduced by Nicolas' patch. I may >> update it and it should go through Vinod's tree with a dependence on patch >> 1/3. >> >> What's your point of view? > > > Indeed. Another option could be to push patches 1 and 3 in dmaengine's tree > and make the 2nd patch go through arm-soc with a dependency on slave-dma GIT > tree (it seems it is an usual patern). > > Arnd, Jean-Christophe, what do you think? I'm not sure patch 1 needs to go through the dma-engine tree? Sure, it's a dma-related header file but it's only used to craft the device tree in patch 2, it doesn't affect the driver. (Arnd has comments on the patch that should be resolved though). -Olof
On Fri, May 31, 2013 at 04:11:40PM -0700, Olof Johansson wrote: > On Fri, May 31, 2013 at 2:31 AM, Nicolas Ferre <nicolas.ferre@atmel.com> wrote: > > On 31/05/2013 11:16, Ludovic Desroches : > >> > >> On Thu, May 30, 2013 at 06:39:36PM +0200, Jean-Christophe PLAGNIOL-VILLARD > >> wrote: > >>> > >>> On 18:32 Thu 30 May , Nicolas Ferre wrote: > >>>> > >>>> On 30/05/2013 18:08, ludovic.desroches@atmel.com : > >>>>> > >>>>> From: Ludovic Desroches <ludovic.desroches@atmel.com> > >>>>> > >>>>> For most devices the FIFO configuration is the same i.e. when half FIFO > >>>>> size is > >>>>> available/filled, a source/destination request is serviced. But USART > >>>>> devices > >>>>> have to do it when there is enough space/data available to perform a > >>>>> single > >>>>> AHB access so the ASAP configuration. > >>>>> > >>>>> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> > >>>>> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> > >>>> > >>>> > >>>> Clear and neat: thanks Ludo. > >>> > >>> > >>> agreed > >>> > >>> can we apply this via AT91 as this depends on some cleanup I did on DT > >>> and > >>> could result on some nigthmware conflict > >>> > >> > >> In fact, I am not sure it's the best solution. I have noticed that there > >> is a > >> conflict with a patch sent by Nicolas (dmaengine: at_hdmac: extend > >> hardware > >> handshaking interface identification) which is already in Vinod's tree but > >> which is not present on Jean-Christophe's cleanup tree on which I based > >> these > >> patches. > >> > >> Moreover this patch doesn't use macros introduced by Nicolas' patch. I may > >> update it and it should go through Vinod's tree with a dependence on patch > >> 1/3. > >> > >> What's your point of view? > > > > > > Indeed. Another option could be to push patches 1 and 3 in dmaengine's tree > > and make the 2nd patch go through arm-soc with a dependency on slave-dma GIT > > tree (it seems it is an usual patern). > > > > Arnd, Jean-Christophe, what do you think? > > I'm not sure patch 1 needs to go through the dma-engine tree? Sure, > it's a dma-related header file but it's only used to craft the device > tree in patch 2, it doesn't affect the driver. > Some macros are used into the at_hdmac driver. Ludovic > (Arnd has comments on the patch that should be resolved though). > > > -Olof
diff --git a/Documentation/devicetree/bindings/dma/atmel-dma.txt b/Documentation/devicetree/bindings/dma/atmel-dma.txt index c80e8a3..c280a0e 100644 --- a/Documentation/devicetree/bindings/dma/atmel-dma.txt +++ b/Documentation/devicetree/bindings/dma/atmel-dma.txt @@ -24,8 +24,11 @@ The three cells in order are: 1. A phandle pointing to the DMA controller. 2. The memory interface (16 most significant bits), the peripheral interface (16 less significant bits). -3. The peripheral identifier for the hardware handshaking interface. The -identifier can be different for tx and rx. +3. Parameters for the at91 DMA configuration register which are device +dependant: + - bit 7-0: peripheral identifier for the hardware handshaking interface. The + identifier can be different for tx and rx. + - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 1 for ASAP. Example: diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index e923cda..bfd73e1 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c @@ -14,6 +14,7 @@ * found on AT91SAM9263. */ +#include <dt-bindings/dma/at91.h> #include <linux/clk.h> #include <linux/dmaengine.h> #include <linux/dma-mapping.h> @@ -1223,14 +1224,30 @@ static struct dma_chan *at_dma_xlate(struct of_phandle_args *dma_spec, atslave = devm_kzalloc(&dmac_pdev->dev, sizeof(*atslave), GFP_KERNEL); if (!atslave) return NULL; + + atslave->cfg = ATC_DST_H2SEL_HW | ATC_SRC_H2SEL_HW; /* * We can fill both SRC_PER and DST_PER, one of these fields will be * ignored depending on DMA transfer direction. */ - per_id = dma_spec->args[1]; - atslave->cfg = ATC_FIFOCFG_HALFFIFO | ATC_DST_H2SEL_HW - | ATC_SRC_H2SEL_HW | ATC_DST_PER(per_id) - | ATC_SRC_PER(per_id); + per_id = dma_spec->args[1] & AT91_DMA_CFG_PER_ID_MASK; + atslave->cfg |= ATC_DST_PER(per_id) | ATC_SRC_PER(per_id); + /* + * We have to translate the value we get from the device tree since + * the half FIFO configuration value had to be 0 to keep backward + * compatibility. + */ + switch(dma_spec->args[1] & AT91_DMA_CFG_FIFOCFG_MASK) { + case AT91_DMA_CFG_FIFOCFG_ALAP: + atslave->cfg |= ATC_FIFOCFG_LARGESTBURST; + break; + case AT91_DMA_CFG_FIFOCFG_ASAP: + atslave->cfg |= ATC_FIFOCFG_ENOUGHSPACE; + break; + case AT91_DMA_CFG_FIFOCFG_HALF: + default: + atslave->cfg |= ATC_FIFOCFG_HALFFIFO; + } atslave->dma_dev = &dmac_pdev->dev; chan = dma_request_channel(mask, at_dma_filter, atslave);