From patchwork Thu May 30 21:45:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: stepanm@codeaurora.org X-Patchwork-Id: 2639161 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id CC83640077 for ; Thu, 30 May 2013 21:45:58 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UiAfP-0003xx-GN; Thu, 30 May 2013 21:45:51 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UiAfM-0002IQ-Fs; Thu, 30 May 2013 21:45:48 +0000 Received: from smtp.codeaurora.org ([198.145.11.231]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UiAfJ-0002Ht-QQ for linux-arm-kernel@lists.infradead.org; Thu, 30 May 2013 21:45:46 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id C5E3F13ED96; Thu, 30 May 2013 21:45:24 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id B7BDB13EF88; Thu, 30 May 2013 21:45:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-caf-smtp.dmz.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED autolearn=ham version=3.3.1 Received: from stepanm-linux.qualcomm.com (i-global252.qualcomm.com [199.106.103.252]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: stepanm@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 39DE113ED96; Thu, 30 May 2013 21:45:24 +0000 (UTC) From: Stepan Moskovchenko To: Russell King , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm: Prevent memory aliasing on non-LPAE kernels Date: Thu, 30 May 2013 14:45:20 -0700 Message-Id: <1369950320-22784-1-git-send-email-stepanm@codeaurora.org> X-Mailer: git-send-email 1.7.8.3 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130530_174545_940229_06920BE9 X-CRM114-Status: GOOD ( 16.76 ) X-Spam-Score: -3.0 (---) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-3.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -1.1 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-arm-msm@vger.kernel.org, David Brown , Stepan Moskovchenko , Bryan Huntsman , Daniel Walker X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Some LPAE-capable systems may use a Device Tree containing memory nodes that describe memory extending beyond the 4GB physical address boundary. Ignore or truncate these memory nodes on kernels that have not been built with LPAE support, to prevent the extended physical addresses from being truncated and aliasing with physical addresses below the 4GB boundary. Signed-off-by: Stepan Moskovchenko --- arch/arm/kernel/devtree.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation diff --git a/arch/arm/kernel/devtree.c b/arch/arm/kernel/devtree.c index bee7f9d..24bc80b 100644 --- a/arch/arm/kernel/devtree.c +++ b/arch/arm/kernel/devtree.c @@ -26,6 +26,18 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size) { +#ifndef CONFIG_ARM_LPAE + if (base > ((phys_addr_t)~0)) { + pr_crit("Ignoring memory at 0x%08llx due to lack of LPAE support\n", + base); + return; + } + + if (size > ((phys_addr_t)~0)) + size = ((phys_addr_t)~0); + + /* arm_add_memory() already checks for the case of base + size > 4GB */ +#endif arm_add_memory(base, size); }