From patchwork Tue Jun 4 10:47:33 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joseph Lo X-Patchwork-Id: 2658361 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 014F940077 for ; Tue, 4 Jun 2013 10:48:17 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ujomk-0004a6-D7; Tue, 04 Jun 2013 10:48:14 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ujomf-0000Dt-UQ; Tue, 04 Jun 2013 10:48:09 +0000 Received: from hqemgate15.nvidia.com ([216.228.121.64]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ujomc-0000Cx-OS for linux-arm-kernel@lists.infradead.org; Tue, 04 Jun 2013 10:48:07 +0000 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 04 Jun 2013 03:47:45 -0700 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Tue, 04 Jun 2013 03:47:13 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Tue, 04 Jun 2013 03:47:13 -0700 Received: from jlo-ubuntu-64.nvidia.com (172.20.144.16) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server (TLS) id 8.3.298.1; Tue, 4 Jun 2013 03:47:47 -0700 From: Joseph Lo To: Stephen Warren Subject: [PATCH V2 2/4] ARM: tegra: hook tegra_tear_down_cpu function in the PM suspend init function Date: Tue, 4 Jun 2013 18:47:33 +0800 Message-ID: <1370342855-32705-3-git-send-email-josephl@nvidia.com> X-Mailer: git-send-email 1.8.3 In-Reply-To: <1370342855-32705-1-git-send-email-josephl@nvidia.com> References: <1370342855-32705-1-git-send-email-josephl@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130604_064806_943721_EA701FDD X-CRM114-Status: GOOD ( 12.70 ) X-Spam-Score: -2.4 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Joseph Lo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The tegra_tear_down_cpu was used to cut off the CPU rail for various Tegra SoCs. Hooking it in the PM suspend init function and making the CPUidle driver more generic. Signed-off-by: Joseph Lo --- V2: * fix the coding style of the runtime chip selection --- arch/arm/mach-tegra/cpuidle-tegra20.c | 3 --- arch/arm/mach-tegra/cpuidle-tegra30.c | 3 --- arch/arm/mach-tegra/pm.c | 15 +++++++++++++++ 3 files changed, 15 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 0cdba8d..d667513 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -214,8 +214,5 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, int __init tegra20_cpuidle_init(void) { -#ifdef CONFIG_PM_SLEEP - tegra_tear_down_cpu = tegra20_tear_down_cpu; -#endif return cpuidle_register(&tegra_idle_driver, cpu_possible_mask); } diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index 3cf9aca..9d9f554 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -146,8 +146,5 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, int __init tegra30_cpuidle_init(void) { -#ifdef CONFIG_PM_SLEEP - tegra_tear_down_cpu = tegra30_tear_down_cpu; -#endif return cpuidle_register(&tegra_idle_driver, NULL); } diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 45cf52c..5e6fb31 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -44,6 +44,20 @@ static DEFINE_SPINLOCK(tegra_lp2_lock); void (*tegra_tear_down_cpu)(void); +static void tegra_tear_down_cpu_init(void) +{ + switch (tegra_chip_id) { + case TEGRA20: + if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) + tegra_tear_down_cpu = tegra20_tear_down_cpu; + break; + case TEGRA30: + if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC)) + tegra_tear_down_cpu = tegra30_tear_down_cpu; + break; + } +} + /* * restore_cpu_complex * @@ -224,6 +238,7 @@ void __init tegra_init_suspend(void) if (tegra_pmc_get_suspend_mode() == TEGRA_SUSPEND_NONE) return; + tegra_tear_down_cpu_init(); tegra_pmc_suspend_init(); suspend_set_ops(&tegra_suspend_ops);