From patchwork Thu Jun 6 11:01:25 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 2681511 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 679FE3FD4E for ; Thu, 6 Jun 2013 15:30:20 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UkY1y-0002vb-RK; Thu, 06 Jun 2013 11:07:03 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UkXzi-000545-6e; Thu, 06 Jun 2013 11:04:38 +0000 Received: from mail-pd0-f174.google.com ([209.85.192.174]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UkXyi-0004vU-U6 for linux-arm-kernel@lists.infradead.org; Thu, 06 Jun 2013 11:03:38 +0000 Received: by mail-pd0-f174.google.com with SMTP id 10so2203912pdc.5 for ; Thu, 06 Jun 2013 04:03:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=NtkyUqsFHu0JAo/uvDbXqq+gctO6pKNWSy06minB9hI=; b=fqOTAEuU/7ueS3/dI8MsiyMnr+GVkGHRsMaDasspRYMlfFhWF7qSG/G6bTZ8vQQCzz JSPLqX1vnpSmTaewyjfM3EA0e0sNKgH+Dn7F5gYYgue8k0jI/Sh/ptPFehk+v4MRHjix eXq86Wged+e58FuVamKbVSpOCdqxXkuVYwV0iHBY6kd1PPWyrH5ABE2v1PlGN7NUUFYC iY+20nfslTeesZ0ULKopKLkc9JCgn2oUkvcxnDTtenSpQqpIWujBPxdmYtBJXOKy0Sq/ Jy+9om3oNat0AcIlH6VFMKi4i47t6bn+NrFJO+QdNkdzWzNIkPsXOmt7PDhnDiMdiu+t xjkQ== X-Received: by 10.68.248.100 with SMTP id yl4mr37592088pbc.125.1370516595033; Thu, 06 Jun 2013 04:03:15 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id qh4sm77248213pac.8.2013.06.06.04.03.11 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 06 Jun 2013 04:03:14 -0700 (PDT) From: Chander Kashyap To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 11/13] clocksource: exynos_mct: extend local timer support for four cores Date: Thu, 6 Jun 2013 16:31:25 +0530 Message-Id: <1370516488-25860-11-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1370516488-25860-1-git-send-email-chander.kashyap@linaro.org> References: <1370516488-25860-1-git-send-email-chander.kashyap@linaro.org> X-Gm-Message-State: ALoCoQkNSx80SmRTpicmXvyW+fbKRuh+Tn/kFFB6EEVOW0ZAS+5bUPcou9m/WP8SXoqjGbMyL0vD X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130606_070337_113591_475ED3E2 X-CRM114-Status: GOOD ( 11.83 ) X-Spam-Score: -1.9 (-) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-1.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [209.85.192.174 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: kgene.kim@samsung.com, linux-serial@vger.kernel.org, t.figa@samsung.com, Chander Kashyap , linux-samsung-soc@vger.kernel.org, thomas.ab@samsung.com, s.nawrocki@samsung.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Extend the local timer interrupt support for handling four local timers. Signed-off-by: Chander Kashyap --- drivers/clocksource/exynos_mct.c | 33 ++++++++++++++++++++++++++++++--- 1 file changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 662fcc0..6af17d4 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -412,6 +412,18 @@ static struct irqaction mct_tick1_event_irq = { .handler = exynos4_mct_tick_isr, }; +static struct irqaction mct_tick2_event_irq = { + .name = "mct_tick2_irq", + .flags = IRQF_TIMER | IRQF_NOBALANCING, + .handler = exynos4_mct_tick_isr, +}; + +static struct irqaction mct_tick3_event_irq = { + .name = "mct_tick3_irq", + .flags = IRQF_TIMER | IRQF_NOBALANCING, + .handler = exynos4_mct_tick_isr, +}; + static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) { struct mct_clock_event_device *mevt; @@ -439,11 +451,21 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt) mct_tick0_event_irq.dev_id = mevt; evt->irq = mct_irqs[MCT_L0_IRQ]; setup_irq(evt->irq, &mct_tick0_event_irq); - } else { + } else if (cpu == 1) { mct_tick1_event_irq.dev_id = mevt; evt->irq = mct_irqs[MCT_L1_IRQ]; setup_irq(evt->irq, &mct_tick1_event_irq); irq_set_affinity(evt->irq, cpumask_of(1)); + } else if (cpu == 2) { + mct_tick2_event_irq.dev_id = mevt; + evt->irq = mct_irqs[MCT_L2_IRQ]; + setup_irq(evt->irq, &mct_tick2_event_irq); + irq_set_affinity(evt->irq, cpumask_of(2)); + } else if (cpu == 3) { + mct_tick3_event_irq.dev_id = mevt; + evt->irq = mct_irqs[MCT_L3_IRQ]; + setup_irq(evt->irq, &mct_tick3_event_irq); + irq_set_affinity(evt->irq, cpumask_of(3)); } } else { enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0); @@ -456,11 +478,16 @@ static void exynos4_local_timer_stop(struct clock_event_device *evt) { unsigned int cpu = smp_processor_id(); evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); - if (mct_int_type == MCT_INT_SPI) + if (mct_int_type == MCT_INT_SPI) { if (cpu == 0) remove_irq(evt->irq, &mct_tick0_event_irq); - else + else if (cpu == 1) remove_irq(evt->irq, &mct_tick1_event_irq); + else if (cpu == 2) + remove_irq(evt->irq, &mct_tick2_event_irq); + else if (cpu == 3) + remove_irq(evt->irq, &mct_tick3_event_irq); + } else disable_percpu_irq(mct_irqs[MCT_L0_IRQ]); }