new file mode 100644
@@ -0,0 +1,71 @@
+/*
+ * This header provides constants for the PRCMU bindings.
+ *
+ */
+
+#ifndef _DT_BINDINGS_MFD_PRCMU_H
+#define _DT_BINDINGS_MFD_PRCMU_H
+
+/*
+ * Clock identifiers.
+ */
+
+#define ARMCLK 0
+#define PRCMU_ACLK 1
+#define PRCMU_SVAMMCSPCLK 2
+#define PRCMU_SIACLK 3
+#define PRCMU_SGACLK 4
+#define PRCMU_UARTCLK 5
+#define PRCMU_MSP02CLK 6
+#define PRCMU_MSP1CLK 7
+#define PRCMU_I2CCLK 8
+#define PRCMU_SDMMCCLK 9
+#define PRCMU_SLIMCLK 10
+#define PRCMU_PER1CLK 11
+#define PRCMU_PER2CLK 12
+#define PRCMU_PER3CLK 13
+#define PRCMU_PER5CLK 14
+#define PRCMU_PER6CLK 15
+#define PRCMU_PER7CLK 16
+#define PRCMU_LCDCLK 17
+#define PRCMU_BMLCLK 18
+#define PRCMU_HSITXCLK 19
+#define PRCMU_HSIRXCLK 20
+#define PRCMU_HDMICLK 21
+#define PRCMU_APEATCLK 22
+#define PRCMU_APETRACECLK 23
+#define PRCMU_MCDECLK 24
+#define PRCMU_IPI2CCLK 25
+#define PRCMU_DSIALTCLK 26
+#define PRCMU_DMACLK 27
+#define PRCMU_B2R2CLK 28
+#define PRCMU_TVCLK 29
+#define SPARE_UNIPROCLK 30
+#define PRCMU_SSPCLK 31
+#define PRCMU_RNGCLK 32
+#define PRCMU_UICCCLK 33
+#define SPARE1CLK 34
+#define SPARE2CLK 35
+
+#define PRCMU_NUM_REG_CLOCKS 39
+
+#define PRCMU_RTCCLK PRCMU_NUM_REG_CLOCKS
+#define PRCMU_SYSCLK 40
+#define PRCMU_CDCLK 41
+#define PRCMU_TIMCLK 42
+#define PRCMU_PLLSOC0 43
+#define PRCMU_PLLSOC1 44
+#define PRCMU_ARMSS 45
+#define PRCMU_PLLDDR 46
+
+/* DSI Clocks */
+#define PRCMU_PLLDSI 47
+#define PRCMU_DSI0CLK 48
+#define PRCMU_DSI1CLK 49
+#define PRCMU_DSI0ESCCLK 50
+#define PRCMU_DSI1ESCCLK 51
+#define PRCMU_DSI2ESCCLK 52
+
+#define PRCMU_NUM_CLKS 53
+
+#endif
These will we used to request DBx500 PRCMU clocks from Device Tree. The numbers used are taken directly from the Hardware Specification document. Signed-off-by: Lee Jones <lee.jones@linaro.org> --- include/dt-bindings/mfd/dbx500-prcmu.h | 71 ++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 include/dt-bindings/mfd/dbx500-prcmu.h