From patchwork Mon Jun 10 19:55:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Santosh Shilimkar X-Patchwork-Id: 2698971 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) by patchwork1.kernel.org (Postfix) with ESMTP id 7BD7F3FD4F for ; Mon, 10 Jun 2013 19:58:13 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Um8DH-0008G7-Kj; Mon, 10 Jun 2013 19:57:12 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Um8Cv-0002yi-6x; Mon, 10 Jun 2013 19:56:49 +0000 Received: from bear.ext.ti.com ([192.94.94.41]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Um8Cf-0002w9-HB for linux-arm-kernel@lists.infradead.org; Mon, 10 Jun 2013 19:56:35 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r5AJu7tU028371; Mon, 10 Jun 2013 14:56:07 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id r5AJu765002021; Mon, 10 Jun 2013 14:56:07 -0500 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Mon, 10 Jun 2013 14:56:06 -0500 Received: from ula0393909.am.dhcp.ti.com (ula0393909.am.dhcp.ti.com [158.218.103.117]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id r5AJtd6v017295; Mon, 10 Jun 2013 14:56:06 -0500 From: Santosh Shilimkar To: Subject: [PATCH 3/3] ARM: dts: keystone: Add minimal Keystone SOC device tree data Date: Mon, 10 Jun 2013 15:55:23 -0400 Message-ID: <1370894123-26846-4-git-send-email-santosh.shilimkar@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1370894123-26846-1-git-send-email-santosh.shilimkar@ti.com> References: <1370894123-26846-1-git-send-email-santosh.shilimkar@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130610_155633_695362_B8B820B3 X-CRM114-Status: GOOD ( 14.67 ) X-Spam-Score: -7.0 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [192.94.94.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.1 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Grant Likely , Olof Johansson , arm@kernel.org, Santosh Shilimkar , Arnd Bergmann X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Add minimal device tree data for Keystone2 based SOCs. Patch contains mainly ARM related SOC data and nothing about EVM specific yet. Cc: Grant Likely Cc: Olof Johansson Cc: Arnd Bergmann Cc: arm@kernel.org Signed-off-by: Santosh Shilimkar --- I have seen some ongoing #include cleanups from Stephen Warren and cpu_node updates from Lorenzo, but since am unaware of the dependencies, dts file is aligned with the v3.10rcx ARM dts files. The changes are very trivial so I can fix them quickly when they show up in linux-next. .../devicetree/bindings/arm/keystone/keystone.txt | 9 ++ arch/arm/boot/dts/keystone.dts | 98 ++++++++++++++++++++ 2 files changed, 107 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/keystone/keystone.txt create mode 100644 arch/arm/boot/dts/keystone.dts diff --git a/Documentation/devicetree/bindings/arm/keystone/keystone.txt b/Documentation/devicetree/bindings/arm/keystone/keystone.txt new file mode 100644 index 0000000..b496d4c --- /dev/null +++ b/Documentation/devicetree/bindings/arm/keystone/keystone.txt @@ -0,0 +1,9 @@ +TI Kesytone Platforms Device Tree Bindings +----------------------------------------------- + +Boards with Keystone2 based devices (TCI66xxK2H) SOC shall have the +following properties. + +Required properties: + - compatible: Every devices present in Keystone SOC should be in + the form "ti,keystone-*"; diff --git a/arch/arm/boot/dts/keystone.dts b/arch/arm/boot/dts/keystone.dts new file mode 100644 index 0000000..9ca7d25 --- /dev/null +++ b/arch/arm/boot/dts/keystone.dts @@ -0,0 +1,98 @@ +/* + * Copyright 2013 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; +/include/ "skeleton.dtsi" + +/ { + model = "Texas Instruments Keystone 2 SoC"; + compatible = "ti,keystone-evm"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + aliases { + serial0 = &uart0; + }; + + memory { + reg = <0x00000000 0x80000000 0x00000000 0x40000000>; + }; + + cpus { + interrupt-parent = <&gic>; + + cpu@0 { + compatible = "arm,cortex-a15"; + }; + + cpu@1 { + compatible = "arm,cortex-a15"; + }; + + cpu@2 { + compatible = "arm,cortex-a15"; + }; + + cpu@3 { + compatible = "arm,cortex-a15"; + }; + }; + + gic: interrupt-controller@02560000 { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + #size-cells = <0>; + #address-cells = <1>; + interrupt-controller; + reg = <0x0 0x02561000 0x0 0x1000>, + <0x0 0x02562000 0x0 0x2000>; + }; + + timer { + compatible = "arm,armv7-timer"; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0x308>; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "ti,keystone","simple-bus"; + interrupt-parent = <&gic>; + ranges = <0x0 0x0 0x0 0xc0000000>; + + rstctrl:rstctrl@23100e8 { + compatible = "ti,keystone-reset"; + reg = <0x023100e8 4>; /* pll reset control reg */ + }; + + uart0: serial@02530c00 { + compatible = "ns16550a"; + current-speed = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + reg = <0x02530c00 0x100>; + clock-frequency = <133120000>; + interrupts = <0 277 0xf01>; + }; + + uart1: serial@02531000 { + compatible = "ns16550a"; + current-speed = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + reg = <0x02531000 0x100>; + clock-frequency = <133120000>; + interrupts = <0 280 0xf01>; + }; + + }; +};