From patchwork Wed Jun 12 16:53:30 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 2711101 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6CB5A9F1E2 for ; Wed, 12 Jun 2013 16:56:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 15E9A20241 for ; Wed, 12 Jun 2013 16:56:27 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A8A5820248 for ; Wed, 12 Jun 2013 16:56:25 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UmoJy-0006yd-4O; Wed, 12 Jun 2013 16:54:55 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UmoJf-0003Pv-45; Wed, 12 Jun 2013 16:54:35 +0000 Received: from mail.free-electrons.com ([94.23.35.102]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UmoJD-0003Kq-Lh for linux-arm-kernel@lists.infradead.org; Wed, 12 Jun 2013 16:54:10 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id EA8BA80F; Wed, 12 Jun 2013 18:53:46 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost (189.58.26.109.rev.sfr.net [109.26.58.189]) by mail.free-electrons.com (Postfix) with ESMTPSA id BA051753; Wed, 12 Jun 2013 18:53:46 +0200 (CEST) From: Maxime Ripard To: Wolfram Sang Subject: [PATCHv5 1/8] i2c: mv64xxx: Add macros to access parts of registers Date: Wed, 12 Jun 2013 18:53:30 +0200 Message-Id: <1371056017-8166-2-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.8.3 In-Reply-To: <1371056017-8166-1-git-send-email-maxime.ripard@free-electrons.com> References: <1371056017-8166-1-git-send-email-maxime.ripard@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130612_125407_935994_9D28F4DC X-CRM114-Status: UNSURE ( 9.93 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.1 (--) Cc: Emilio Lopez , Tomasz Figa , linux-sunxi@googlegroups.com, linux-i2c@vger.kernel.org, sunny@allwinnertech.com, shuge@allwinnertech.com, Maxime Ripard , kevin@allwinnertech.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP These macros make it more comprehensive to access to useful masked and shifted area of the various registers used. Signed-off-by: Maxime Ripard --- drivers/i2c/busses/i2c-mv64xxx.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c index 6356439..d70a2fda 100644 --- a/drivers/i2c/busses/i2c-mv64xxx.c +++ b/drivers/i2c/busses/i2c-mv64xxx.c @@ -33,6 +33,10 @@ #define MV64XXX_I2C_REG_EXT_SLAVE_ADDR 0x10 #define MV64XXX_I2C_REG_SOFT_RESET 0x1c +#define MV64XXX_I2C_ADDR_ADDR(val) ((val & 0x7f) << 1) +#define MV64XXX_I2C_BAUD_DIV_N(val) (val & 0x7) +#define MV64XXX_I2C_BAUD_DIV_M(val) ((val & 0xf) << 3) + #define MV64XXX_I2C_REG_CONTROL_ACK 0x00000004 #define MV64XXX_I2C_REG_CONTROL_IFLG 0x00000008 #define MV64XXX_I2C_REG_CONTROL_STOP 0x00000010 @@ -133,7 +137,7 @@ mv64xxx_i2c_prepare_for_io(struct mv64xxx_i2c_data *drv_data, drv_data->addr1 = 0xf0 | (((u32)msg->addr & 0x300) >> 7) | dir; drv_data->addr2 = (u32)msg->addr & 0xff; } else { - drv_data->addr1 = ((u32)msg->addr & 0x7f) << 1 | dir; + drv_data->addr1 = MV64XXX_I2C_ADDR_ADDR((u32)msg->addr) | dir; drv_data->addr2 = 0; } } @@ -151,7 +155,7 @@ static void mv64xxx_i2c_hw_init(struct mv64xxx_i2c_data *drv_data) { writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SOFT_RESET); - writel((((drv_data->freq_m & 0xf) << 3) | (drv_data->freq_n & 0x7)), + writel(MV64XXX_I2C_BAUD_DIV_M(drv_data->freq_m) | MV64XXX_I2C_BAUD_DIV_N(drv_data->freq_n), drv_data->reg_base + MV64XXX_I2C_REG_BAUD); writel(0, drv_data->reg_base + MV64XXX_I2C_REG_SLAVE_ADDR); writel(0, drv_data->reg_base + MV64XXX_I2C_REG_EXT_SLAVE_ADDR);