| Message ID | 1371200637-20850-1-git-send-email-chao.xie@marvell.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Friday 14 June 2013, Chao Xie wrote: > Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, > pj4_cpu0_init just return. > This fix will help to make the all the V7 cpus(pj4 and no-PJ4) > use same platform code. > > Signed-off-by: Chao Xie <chao.xie@marvell.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
On Fri, Jun 14, 2013 at 05:03:57AM -0400, Chao Xie wrote: > Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, > pj4_cpu0_init just return. > This fix will help to make the all the V7 cpus(pj4 and no-PJ4) > use same platform code. > > Signed-off-by: Chao Xie <chao.xie@marvell.com> > Acked-by: Arnd Bergmann <arnd@arndb.de> This patch fixes a boot failure in next now that ARCH_DOVE (and thus CPU_PJ4) are enabled in multi_v7_defconfig. I verified that boot works again in next with the BCM28155-AP board. Tested-by: Matt Porter <mporter@linaro.org> > arch/arm/kernel/pj4-cp0.c | 11 +++++++++++ > 1 files changed, 11 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c > index 679cf4d..bf658d3 100644 > --- a/arch/arm/kernel/pj4-cp0.c > +++ b/arch/arm/kernel/pj4-cp0.c > @@ -17,6 +17,10 @@ > #include <linux/init.h> > #include <linux/io.h> > #include <asm/thread_notify.h> > +#include <asm/cputype.h> > + > +#define CORE_PJ4_MASK 0xfffffff0 > +#define CORE_PJ4_ID 0x562f5840 > > static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t) > { > @@ -79,6 +83,13 @@ static void __init pj4_cp_access_write(u32 value) > static int __init pj4_cp0_init(void) > { > u32 cp_access; > + unsigned int cpuid; > + > + cpuid = read_cpuid_id(); > + > + /* If it is not a pj4 core, skip it. */ > + if ((cpuid & CORE_PJ4_MASK) != CORE_PJ4_ID) > + return 0; > > cp_access = pj4_cp_access_read() & ~0xf; > pj4_cp_access_write(cp_access);
On Tue, Mar 18, 2014 at 1:15 PM, Matt Porter <mporter@linaro.org> wrote: > On Fri, Jun 14, 2013 at 05:03:57AM -0400, Chao Xie wrote: >> Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, >> pj4_cpu0_init just return. >> This fix will help to make the all the V7 cpus(pj4 and no-PJ4) >> use same platform code. >> >> Signed-off-by: Chao Xie <chao.xie@marvell.com> >> Acked-by: Arnd Bergmann <arnd@arndb.de> > > This patch fixes a boot failure in next now that ARCH_DOVE (and thus > CPU_PJ4) are enabled in multi_v7_defconfig. I verified that boot works > again in next with the BCM28155-AP board. > > Tested-by: Matt Porter <mporter@linaro.org> I've also verified that this fixes the boot regression on the BCM28155-AP board. Tested-by: Kevin Hilman <khilman@linaro.org> Chao, can you collect the acks/tested-bys and submit this to Russell's patch tracker[1] so he can apply it please?. Thanks. Kevin [1] http://www.arm.linux.org.uk/developer/patches/
On Tue, Mar 18, 2014 at 01:19:35PM -0700, Kevin Hilman wrote: > On Tue, Mar 18, 2014 at 1:15 PM, Matt Porter <mporter@linaro.org> wrote: > > On Fri, Jun 14, 2013 at 05:03:57AM -0400, Chao Xie wrote: > >> Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, > >> pj4_cpu0_init just return. > >> This fix will help to make the all the V7 cpus(pj4 and no-PJ4) > >> use same platform code. > >> > >> Signed-off-by: Chao Xie <chao.xie@marvell.com> > >> Acked-by: Arnd Bergmann <arnd@arndb.de> > > > > This patch fixes a boot failure in next now that ARCH_DOVE (and thus > > CPU_PJ4) are enabled in multi_v7_defconfig. I verified that boot works > > again in next with the BCM28155-AP board. > > > > Tested-by: Matt Porter <mporter@linaro.org> > > I've also verified that this fixes the boot regression on the BCM28155-AP board. > > Tested-by: Kevin Hilman <khilman@linaro.org> > > Chao, can you collect the acks/tested-bys and submit this to Russell's > patch tracker[1] so he can apply it please?. Thanks. Any reason not put the IDs in asm/cputype.h, where all the others are - and maybe also a cpu_is_pj4() inline function too?
On Wed, Mar 19, 2014 at 4:32 AM, Russell King - ARM Linux <linux@arm.linux.org.uk> wrote: > On Tue, Mar 18, 2014 at 01:19:35PM -0700, Kevin Hilman wrote: >> On Tue, Mar 18, 2014 at 1:15 PM, Matt Porter <mporter@linaro.org> wrote: >> > On Fri, Jun 14, 2013 at 05:03:57AM -0400, Chao Xie wrote: >> >> Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, >> >> pj4_cpu0_init just return. >> >> This fix will help to make the all the V7 cpus(pj4 and no-PJ4) >> >> use same platform code. >> >> >> >> Signed-off-by: Chao Xie <chao.xie@marvell.com> >> >> Acked-by: Arnd Bergmann <arnd@arndb.de> >> > >> > This patch fixes a boot failure in next now that ARCH_DOVE (and thus >> > CPU_PJ4) are enabled in multi_v7_defconfig. I verified that boot works >> > again in next with the BCM28155-AP board. >> > >> > Tested-by: Matt Porter <mporter@linaro.org> >> >> I've also verified that this fixes the boot regression on the BCM28155-AP board. >> >> Tested-by: Kevin Hilman <khilman@linaro.org> >> >> Chao, can you collect the acks/tested-bys and submit this to Russell's >> patch tracker[1] so he can apply it please?. Thanks. > > Any reason not put the IDs in asm/cputype.h, where all the others are - > and maybe also a cpu_is_pj4() inline function too? > Sure, i can put it at arch/arm/asm/include/cputype.h I will send the patch later. Thanks. > -- > FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly > improving, and getting towards what was expected from it.
On 03/18/2014 02:15 PM, Matt Porter wrote: > On Fri, Jun 14, 2013 at 05:03:57AM -0400, Chao Xie wrote: >> Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, >> pj4_cpu0_init just return. >> This fix will help to make the all the V7 cpus(pj4 and no-PJ4) >> use same platform code. >> >> Signed-off-by: Chao Xie <chao.xie@marvell.com> >> Acked-by: Arnd Bergmann <arnd@arndb.de> > > This patch fixes a boot failure in next now that ARCH_DOVE (and thus > CPU_PJ4) are enabled in multi_v7_defconfig. I verified that boot works > again in next with the BCM28155-AP board. > > Tested-by: Matt Porter <mporter@linaro.org> This also solves the Tegra SoC boot failures with next-20130320. Tested-by: Stephen Warren <swarren@nvidia.com>
diff --git a/arch/arm/kernel/pj4-cp0.c b/arch/arm/kernel/pj4-cp0.c index 679cf4d..bf658d3 100644 --- a/arch/arm/kernel/pj4-cp0.c +++ b/arch/arm/kernel/pj4-cp0.c @@ -17,6 +17,10 @@ #include <linux/init.h> #include <linux/io.h> #include <asm/thread_notify.h> +#include <asm/cputype.h> + +#define CORE_PJ4_MASK 0xfffffff0 +#define CORE_PJ4_ID 0x562f5840 static int iwmmxt_do(struct notifier_block *self, unsigned long cmd, void *t) { @@ -79,6 +83,13 @@ static void __init pj4_cp_access_write(u32 value) static int __init pj4_cp0_init(void) { u32 cp_access; + unsigned int cpuid; + + cpuid = read_cpuid_id(); + + /* If it is not a pj4 core, skip it. */ + if ((cpuid & CORE_PJ4_MASK) != CORE_PJ4_ID) + return 0; cp_access = pj4_cp_access_read() & ~0xf; pj4_cp_access_write(cp_access);
Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus, pj4_cpu0_init just return. This fix will help to make the all the V7 cpus(pj4 and no-PJ4) use same platform code. Signed-off-by: Chao Xie <chao.xie@marvell.com> --- arch/arm/kernel/pj4-cp0.c | 11 +++++++++++ 1 files changed, 11 insertions(+), 0 deletions(-)