diff mbox

pinctrl: update GPIO range doc

Message ID 1371377909-5921-1-git-send-email-linus.walleij@stericsson.com (mailing list archive)
State New, archived
Headers show

Commit Message

Linus Walleij June 16, 2013, 10:18 a.m. UTC
From: Linus Walleij <linus.walleij@linaro.org>

This updates the GPIO range documentation with the API changes
for sparse/random/arbitrary pin-to-GPIO mappings.

Cc: Christian Ruppert <christian.ruppert@abilis.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 Documentation/pinctrl.txt | 24 +++++++++++++++++++++---
 1 file changed, 21 insertions(+), 3 deletions(-)

Comments

Rob Landley June 17, 2013, 5:20 a.m. UTC | #1
On 06/16/2013 05:18:29 AM, Linus Walleij wrote:
> From: Linus Walleij <linus.walleij@linaro.org>
> 
> This updates the GPIO range documentation with the API changes
> for sparse/random/arbitrary pin-to-GPIO mappings.

Acked-by: Rob Landley <rob@landley.net>

Why isn't this part of the pinctrl series you posted right afterwards?  
(It should go in through that maintainer...)

>  For all functionalities dealing with pin biasing, pin muxing etc,  
> the pin
> -controller subsystem will subtract the range's .base offset from the  
> passed
> -in gpio number, and add the ranges's .pin_base offset to retrive a  
> pin number.
> -After that, the subsystem passes it on to the pin control driver, so  
> the driver
> +controller subsystem will look up the corresponding pin number from  
> the passed
> +in gpio number, and use the ranges internals to retrive a pin  
> number. After

Range's perhaps?

Rob
Christian Ruppert June 17, 2013, 8:11 a.m. UTC | #2
On Sun, Jun 16, 2013 at 12:18:29PM +0200, Linus Walleij wrote:
> From: Linus Walleij <linus.walleij@linaro.org>
> 
> This updates the GPIO range documentation with the API changes
> for sparse/random/arbitrary pin-to-GPIO mappings.

Oops, sorry, I should have thought of updating this with my previous
patch. Thanks for stepping in.

Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com>

> Cc: Christian Ruppert <christian.ruppert@abilis.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
>  Documentation/pinctrl.txt | 24 +++++++++++++++++++++---
>  1 file changed, 21 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
> index f6e664b..4548743 100644
> --- a/Documentation/pinctrl.txt
> +++ b/Documentation/pinctrl.txt
> @@ -350,6 +350,23 @@ chip b:
>   - GPIO range : [48 .. 55]
>   - pin range  : [64 .. 71]
>  
> +The above examples assume the mapping between the GPIOs and pins is
> +linear. If the mapping is sparse or haphazard, an array of arbitrary pin
> +numbers can be encoded in the range like this:
> +
> +static const unsigned range_pins[] = { 14, 1, 22, 17, 10, 8, 6, 2 };
> +
> +static struct pinctrl_gpio_range gpio_range = {
> +	.name = "chip",
> +	.id = 0,
> +	.base = 32,
> +	.pins = &range_pins,
> +	.npins = ARRAY_SIZE(range_pins),
> +	.gc = &chip;
> +};
> +
> +In this case the pin_base property will be ignored.
> +
>  When GPIO-specific functions in the pin control subsystem are called, these
>  ranges will be used to look up the appropriate pin controller by inspecting
>  and matching the pin to the pin ranges across all controllers. When a
> @@ -357,9 +374,9 @@ pin controller handling the matching range is found, GPIO-specific functions
>  will be called on that specific pin controller.
>  
>  For all functionalities dealing with pin biasing, pin muxing etc, the pin
> -controller subsystem will subtract the range's .base offset from the passed
> -in gpio number, and add the ranges's .pin_base offset to retrive a pin number.
> -After that, the subsystem passes it on to the pin control driver, so the driver
> +controller subsystem will look up the corresponding pin number from the passed
> +in gpio number, and use the ranges internals to retrive a pin number. After
> +that, the subsystem passes it on to the pin control driver, so the driver
>  will get an pin number into its handled number range. Further it is also passed
>  the range ID value, so that the pin controller knows which range it should
>  deal with.
> @@ -368,6 +385,7 @@ Calling pinctrl_add_gpio_range from pinctrl driver is DEPRECATED. Please see
>  section 2.1 of Documentation/devicetree/bindings/gpio/gpio.txt on how to bind
>  pinctrl and gpio drivers.
>  
> +
>  PINMUX interfaces
>  =================
>  
> -- 
> 1.7.11.3
>
Linus Walleij June 17, 2013, 4:14 p.m. UTC | #3
On Mon, Jun 17, 2013 at 7:20 AM, Rob Landley <rob@landley.net> wrote:
> On 06/16/2013 05:18:29 AM, Linus Walleij wrote:
>>
>> From: Linus Walleij <linus.walleij@linaro.org>
>>
>> This updates the GPIO range documentation with the API changes
>> for sparse/random/arbitrary pin-to-GPIO mappings.
>
> Acked-by: Rob Landley <rob@landley.net>
>
> Why isn't this part of the pinctrl series you posted right afterwards? (It
> should go in through that maintainer...)

Well I'm the pinctrl maintainer so I keep it all in my head :-D

>> +in gpio number, and use the ranges internals to retrive a pin number.
>> After
>
> Range's perhaps?

Thanks, fixed it up.

Yours,
Linus Walleij
diff mbox

Patch

diff --git a/Documentation/pinctrl.txt b/Documentation/pinctrl.txt
index f6e664b..4548743 100644
--- a/Documentation/pinctrl.txt
+++ b/Documentation/pinctrl.txt
@@ -350,6 +350,23 @@  chip b:
  - GPIO range : [48 .. 55]
  - pin range  : [64 .. 71]
 
+The above examples assume the mapping between the GPIOs and pins is
+linear. If the mapping is sparse or haphazard, an array of arbitrary pin
+numbers can be encoded in the range like this:
+
+static const unsigned range_pins[] = { 14, 1, 22, 17, 10, 8, 6, 2 };
+
+static struct pinctrl_gpio_range gpio_range = {
+	.name = "chip",
+	.id = 0,
+	.base = 32,
+	.pins = &range_pins,
+	.npins = ARRAY_SIZE(range_pins),
+	.gc = &chip;
+};
+
+In this case the pin_base property will be ignored.
+
 When GPIO-specific functions in the pin control subsystem are called, these
 ranges will be used to look up the appropriate pin controller by inspecting
 and matching the pin to the pin ranges across all controllers. When a
@@ -357,9 +374,9 @@  pin controller handling the matching range is found, GPIO-specific functions
 will be called on that specific pin controller.
 
 For all functionalities dealing with pin biasing, pin muxing etc, the pin
-controller subsystem will subtract the range's .base offset from the passed
-in gpio number, and add the ranges's .pin_base offset to retrive a pin number.
-After that, the subsystem passes it on to the pin control driver, so the driver
+controller subsystem will look up the corresponding pin number from the passed
+in gpio number, and use the ranges internals to retrive a pin number. After
+that, the subsystem passes it on to the pin control driver, so the driver
 will get an pin number into its handled number range. Further it is also passed
 the range ID value, so that the pin controller knows which range it should
 deal with.
@@ -368,6 +385,7 @@  Calling pinctrl_add_gpio_range from pinctrl driver is DEPRECATED. Please see
 section 2.1 of Documentation/devicetree/bindings/gpio/gpio.txt on how to bind
 pinctrl and gpio drivers.
 
+
 PINMUX interfaces
 =================