From patchwork Tue Jun 18 10:00:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Jensen X-Patchwork-Id: 2740261 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 05592C0AB1 for ; Tue, 18 Jun 2013 10:01:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BF1CF20273 for ; Tue, 18 Jun 2013 10:01:27 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7390F20229 for ; Tue, 18 Jun 2013 10:01:26 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UosiW-0006ix-HI; Tue, 18 Jun 2013 10:00:48 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UosiM-0003HL-Ge; Tue, 18 Jun 2013 10:00:38 +0000 Received: from mail-la0-x22e.google.com ([2a00:1450:4010:c03::22e]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UosiI-0003Fm-Ma for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2013 10:00:36 +0000 Received: by mail-la0-f46.google.com with SMTP id eg20so3384679lab.33 for ; Tue, 18 Jun 2013 03:00:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer; bh=iUHAc3WWYkbbFWvAQaoNii5VV7iNEyu1M2YCwzp2Mas=; b=KJ3+tThBrKb6B1aQA+ZXQFmKvT6PARol3jjvUAwSCuDFpnA/2a2VmpwSv6/hQhSvB5 AMUEkenTuEZJUVfWp0S1jBqTGnaXUJG/ClD0+DoJ6oqiNP0fv0eNnPHXV+ypBq9Z3lVb n3tw/NCrIcKvYWW+SEVSODGLTdooHJ+joTT/RUlbH/0i3i07uE7ASN65CGSw0jdJGnB1 p2aeiEhVL09tSgEd7AYHRpPYm9bsHgx3tWvdsz+HbfriYzR3ZZBdjd9M8goNUvtDhjeg lUO0y3cABGAvt/jANUilq7EdiCWAUe3dt7l0VpjEWgMMASiH1RfSNm5zZrftIywlstcc Nahw== X-Received: by 10.112.28.48 with SMTP id y16mr749752lbg.37.1371549612384; Tue, 18 Jun 2013 03:00:12 -0700 (PDT) Received: from localhost.localdomain (static-213-115-41-10.sme.bredbandsbolaget.se. [213.115.41.10]) by mx.google.com with ESMTPSA id u1sm7218786lag.5.2013.06.18.03.00.10 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 18 Jun 2013 03:00:11 -0700 (PDT) From: Jonas Jensen To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] ARM: clocksource: add support for MOXA ART SoCs Date: Tue, 18 Jun 2013 12:00:04 +0200 Message-Id: <1371549604-7201-1-git-send-email-jonas.jensen@gmail.com> X-Mailer: git-send-email 1.7.2.5 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130618_060035_233818_C62B3E2C X-CRM114-Status: GOOD ( 17.93 ) X-Spam-Score: -2.0 (--) Cc: tglx@linutronix.de, arm@kernel.org, john.stultz@linaro.org, linux-kernel@vger.kernel.org, Jonas Jensen X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.3 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds an clocksource driver for the main timer found on MOXA ART SoCs. Applies to 3.10-rc1 and arm-soc/for-next (2013-06-15) Signed-off-by: Jonas Jensen --- drivers/clocksource/Makefile | 1 + drivers/clocksource/moxart_timer.c | 129 ++++++++++++++++++++++++++++++++++++ 2 files changed, 130 insertions(+), 0 deletions(-) create mode 100644 drivers/clocksource/moxart_timer.c diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 8d979c7..c93e1a8 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -29,3 +29,4 @@ obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o +obj-$(CONFIG_ARCH_MOXART) += moxart_timer.o diff --git a/drivers/clocksource/moxart_timer.c b/drivers/clocksource/moxart_timer.c new file mode 100644 index 0000000..ce5a5a2 --- /dev/null +++ b/drivers/clocksource/moxart_timer.c @@ -0,0 +1,129 @@ +/* + * MOXA ART SoCs timer handling. + * + * Copyright (C) 2013 Jonas Jensen + * + * Jonas Jensen + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define APB_CLK 48000000 + +#define TIMER_1_COUNT(base_addr) (base_addr + 0x00) +#define TIMER_1_LOAD(base_addr) (base_addr + 0x04) +#define TIMER_1_MATCH1(base_addr) (base_addr + 0x08) +#define TIMER_1_MATCH2(base_addr) (base_addr + 0x0C) + +#define TIMER_2_COUNT(base_addr) (base_addr + 0x10) +#define TIMER_2_LOAD(base_addr) (base_addr + 0x14) +#define TIMER_2_MATCH1(base_addr) (base_addr + 0x18) +#define TIMER_2_MATCH2(base_addr) (base_addr + 0x1C) + +#define TIMER_3_COUNT(base_addr) (base_addr + 0x20) +#define TIMER_3_LOAD(base_addr) (base_addr + 0x24) +#define TIMER_3_MATCH1(base_addr) (base_addr + 0x28) +#define TIMER_3_MATCH2(base_addr) (base_addr + 0x2C) + +#define TIMER_CR(base_addr) (base_addr + 0x30) + +#define TIMER_1_CR_ENABLE(base_addr) (base_addr + 0x30) +#define TIMER_1_CR_EXTCLK(base_addr) (base_addr + 0x34) +#define TIMER_1_CR_FLOWIN(base_addr) (base_addr + 0x38) + +#define TIMER_2_CR_ENABLE(base_addr) (base_addr + 0x42) +#define TIMER_2_CR_EXTCLK(base_addr) (base_addr + 0x46) +#define TIMER_2_CR_FLOWIN(base_addr) (base_addr + 0x50) + +#define TIMER_3_CR_ENABLE(base_addr) (base_addr + 0x54) +#define TIMER_3_CR_EXTCLK(base_addr) (base_addr + 0x58) +#define TIMER_3_CR_FLOWIN(base_addr) (base_addr + 0x62) + +#define TIMER_INTR_STATE(base_addr) (base_addr + 0x34) + +#define TIMEREG_1_CR_ENABLE (1 << 0) +#define TIMEREG_1_CR_CLOCK (1 << 1) +#define TIMEREG_1_CR_INT (1 << 2) +#define TIMEREG_2_CR_ENABLE (1 << 3) +#define TIMEREG_2_CR_CLOCK (1 << 4) +#define TIMEREG_2_CR_INT (1 << 5) +#define TIMEREG_3_CR_ENABLE (1 << 6) +#define TIMEREG_3_CR_CLOCK (1 << 7) +#define TIMEREG_3_CR_INT (1 << 8) +#define TIMEREG_COUNT_UP (1 << 9) +#define TIMEREG_COUNT_DOWN (0 << 9) + +#define MAX_TIMER 2 +#define USED_TIMER 1 + +#define TIMER1_COUNT 0x0 +#define TIMER1_LOAD 0x4 +#define TIMER1_MATCH1 0x8 +#define TIMER1_MATCH2 0xC +#define TIMER2_COUNT 0x10 +#define TIMER2_LOAD 0x14 +#define TIMER2_MATCH1 0x18 +#define TIMER2_MATCH2 0x1C +#define TIMER3_COUNT 0x20 +#define TIMER3_LOAD 0x24 +#define TIMER3_MATCH1 0x28 +#define TIMER3_MATCH2 0x2C +#define TIMER_INTR_MASK 0x38 + +static void __iomem *timer_base; + +static irqreturn_t moxart_timer_interrupt(int irq, void *dev_id) +{ + timer_tick(); + return IRQ_HANDLED; +} + +static struct irqaction moxart_timer_irq = { + .name = "moxart-timer", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = moxart_timer_interrupt, +}; + +static void __init moxart_timer_init(struct device_node *node) +{ + int ret, irq; + + timer_base = of_iomap(node, 0); + if (!timer_base) + panic("%s: failed to map base\n", node->full_name); + + irq = irq_of_parse_and_map(node, 0); + if (irq <= 0) + panic("%s: can't parse IRQ\n", node->full_name); + + ret = setup_irq(irq, &moxart_timer_irq); + if (ret) + pr_warn("%s: failed to setup IRQ %d\n", node->full_name, irq); + + + writel(APB_CLK / HZ, TIMER_1_COUNT(timer_base)); + writel(APB_CLK / HZ, TIMER_1_LOAD(timer_base)); + + writel(1, TIMER_1_CR_ENABLE(timer_base)); + writel(0, TIMER_1_CR_EXTCLK(timer_base)); + writel(1, TIMER_1_CR_FLOWIN(timer_base)); + + pr_info("%s: count/load (APB_CLK=%d/HZ=%d) IRQ=%d\n", + node->full_name, APB_CLK, HZ, irq); +} +CLOCKSOURCE_OF_DECLARE(moxart, "moxa,moxart-timer", moxart_timer_init); +