From patchwork Tue Jun 18 11:25:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 2741311 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2035B9F472 for ; Tue, 18 Jun 2013 11:50:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D923420439 for ; Tue, 18 Jun 2013 11:50:46 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3DAE920437 for ; Tue, 18 Jun 2013 11:50:45 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uou6v-00086g-Ip; Tue, 18 Jun 2013 11:30:10 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uou5C-0005hw-Jq; Tue, 18 Jun 2013 11:28:18 +0000 Received: from mail.free-electrons.com ([94.23.35.102]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uou3g-0005ZU-Fe for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2013 11:26:49 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id 1CB907CD; Tue, 18 Jun 2013 13:26:28 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost.localdomain (unknown [190.2.109.25]) by mail.free-electrons.com (Postfix) with ESMTPA id 38188759; Tue, 18 Jun 2013 13:26:23 +0200 (CEST) From: Ezequiel Garcia To: , Subject: [PATCH v3 09/12] ARM: mvebu: Add BootROM to Armada 370/XP device tree Date: Tue, 18 Jun 2013 08:25:34 -0300 Message-Id: <1371554737-25319-10-git-send-email-ezequiel.garcia@free-electrons.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1371554737-25319-1-git-send-email-ezequiel.garcia@free-electrons.com> References: <1371554737-25319-1-git-send-email-ezequiel.garcia@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130618_072644_844202_90102CFF X-CRM114-Status: UNSURE ( 9.78 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -3.1 (---) Cc: Thomas Petazzoni , Andrew Lunn , Jason Cooper , Arnd Bergmann , Grant Likely , Jason Gunthorpe , Maen Suleiman , Lior Amsalem , Ezequiel Garcia , Gregory Clement , Sebastian Hesselbarth X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP In order to access the SoC BootROM, we need to declare a mapping (through a ranges property). The mbus driver will use this property to allocate a suitable address decoding window. Signed-off-by: Ezequiel Garcia --- arch/arm/boot/dts/armada-370-db.dts | 3 ++- arch/arm/boot/dts/armada-370-mirabox.dts | 3 ++- arch/arm/boot/dts/armada-370-rd.dts | 3 ++- arch/arm/boot/dts/armada-370-xp.dtsi | 2 ++ arch/arm/boot/dts/armada-370.dtsi | 6 ++++++ arch/arm/boot/dts/armada-xp-db.dts | 3 ++- arch/arm/boot/dts/armada-xp-gp.dts | 3 ++- arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 3 ++- arch/arm/boot/dts/armada-xp.dtsi | 6 ++++++ 9 files changed, 26 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/armada-370-db.dts b/arch/arm/boot/dts/armada-370-db.dts index 530d1cf..c313968 100644 --- a/arch/arm/boot/dts/armada-370-db.dts +++ b/arch/arm/boot/dts/armada-370-db.dts @@ -30,7 +30,8 @@ }; soc { - ranges = <0xffff0001 0 0xd0000000 0x100000>; + ranges = <0xffff0001 0 0xd0000000 0x100000 + MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; internal-regs { serial@12000 { diff --git a/arch/arm/boot/dts/armada-370-mirabox.dts b/arch/arm/boot/dts/armada-370-mirabox.dts index ad60835..abb1ccf 100644 --- a/arch/arm/boot/dts/armada-370-mirabox.dts +++ b/arch/arm/boot/dts/armada-370-mirabox.dts @@ -25,7 +25,8 @@ }; soc { - ranges = <0xffff0001 0 0xd0000000 0x100000>; + ranges = <0xffff0001 0 0xd0000000 0x100000 + MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; internal-regs { serial@12000 { diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index 9c2ab7f..9ae8bdc 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts @@ -28,7 +28,8 @@ }; soc { - ranges = <0xffff0001 0 0xd0000000 0x100000>; + ranges = <0xffff0001 0 0xd0000000 0x100000 + MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; internal-regs { serial@12000 { diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index 633534dd..4ae5eb5 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -16,6 +16,8 @@ * 370 and Armada XP SoC. */ +#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) + /include/ "skeleton64.dtsi" / { diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index c274b7b..c7f9971 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -32,6 +32,12 @@ compatible = "marvell,armada370-mbus", "simple-bus"; reg = <0xd0020000 0x100>, <0xd0020180 0x20>; + bootrom { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 MBUS_ID(0x01, 0xe0) 0 0xffffffff>; + }; + internal-regs { system-controller@18200 { compatible = "marvell,armada-370-xp-system-controller"; diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts index 0996215..84e7ab2 100644 --- a/arch/arm/boot/dts/armada-xp-db.dts +++ b/arch/arm/boot/dts/armada-xp-db.dts @@ -30,7 +30,8 @@ }; soc { - ranges = <0xffff0001 0 0 0xd0000000 0x100000>; + ranges = <0xffff0001 0 0 0xd0000000 0x100000 + MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; internal-regs { serial@12000 { diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index f095a3e..1f4daa7 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -39,7 +39,8 @@ }; soc { - ranges = <0xffff0001 0 0 0xd0000000 0x100000>; + ranges = <0xffff0001 0 0 0xd0000000 0x100000 + MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; internal-regs { serial@12000 { diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index 91827cb..ea47196 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -27,7 +27,8 @@ }; soc { - ranges = <0xffff0001 0 0 0xd0000000 0x100000>; + ranges = <0xffff0001 0 0 0xd0000000 0x100000 + MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>; internal-regs { serial@12000 { diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index feec757..2516899 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -26,6 +26,12 @@ compatible = "marvell,armadaxp-mbus", "simple-bus"; reg = <0 0xd0020000 0 0x100>, <0 0xd0020180 0 0x20>; + bootrom { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 MBUS_ID(0x01, 0x1d) 0 0xffffffff>; + }; + internal-regs { L2: l2-cache { compatible = "marvell,aurora-system-cache";