From patchwork Wed Jun 19 20:07:19 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ezequiel Garcia X-Patchwork-Id: 2751961 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E319FC0AB1 for ; Wed, 19 Jun 2013 20:11:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 195BD20497 for ; Wed, 19 Jun 2013 20:11:48 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F329E20197 for ; Wed, 19 Jun 2013 20:11:46 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UpOhC-0002MP-2p; Wed, 19 Jun 2013 20:09:35 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UpOgV-0004cn-3N; Wed, 19 Jun 2013 20:08:51 +0000 Received: from mail.free-electrons.com ([94.23.35.102]) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UpOfq-0004WL-Gi for linux-arm-kernel@lists.infradead.org; Wed, 19 Jun 2013 20:08:12 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id 8707F7D2; Wed, 19 Jun 2013 22:07:51 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from localhost.localdomain (unknown [190.2.109.25]) by mail.free-electrons.com (Postfix) with ESMTPA id 8237B739; Wed, 19 Jun 2013 22:07:47 +0200 (CEST) From: Ezequiel Garcia To: , Subject: [PATCH v4 05/12] ARM: mvebu: Remove the harcoded BootROM window allocation Date: Wed, 19 Jun 2013 17:07:19 -0300 Message-Id: <1371672446-21583-6-git-send-email-ezequiel.garcia@free-electrons.com> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1371672446-21583-1-git-send-email-ezequiel.garcia@free-electrons.com> References: <1371672446-21583-1-git-send-email-ezequiel.garcia@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130619_160810_731187_80F3D277 X-CRM114-Status: GOOD ( 15.00 ) X-Spam-Score: -3.2 (---) Cc: Thomas Petazzoni , Andrew Lunn , Jason Cooper , Arnd Bergmann , Grant Likely , Jason Gunthorpe , Maen Suleiman , Lior Amsalem , Ezequiel Garcia , Gregory Clement , Sebastian Hesselbarth X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The address decoding window to access the BootROM should not be allocated programatically, but declared in the device tree. Instead of allocating it, we add a check to verify the DT has declared a valid node to access the BootROM. Signed-off-by: Ezequiel Garcia --- arch/arm/mach-mvebu/platsmp.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c index 93f2f3a..a952f8d 100644 --- a/arch/arm/mach-mvebu/platsmp.c +++ b/arch/arm/mach-mvebu/platsmp.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -29,6 +30,9 @@ #include "pmsu.h" #include "coherency.h" +#define AXP_BOOTROM_BASE 0xfff00000 +#define AXP_BOOTROM_SIZE 0x100000 + void __init set_secondary_cpus_clock(void) { int thiscpu; @@ -115,10 +119,29 @@ static void __init armada_xp_smp_init_cpus(void) void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) { + struct device_node *node; + struct resource res; + int err; + set_secondary_cpus_clock(); flush_cache_all(); set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); - mvebu_mbus_add_window("bootrom", 0xfff00000, SZ_1M); + + /* + * In order to boot the secondary CPUs we need to ensure + * the bootROM is mapped at the correct address. + */ + node = of_find_compatible_node(NULL, NULL, "marvell,bootrom"); + if (!node) + panic("Cannot find 'marvell,bootrom' compatible node"); + + err = of_address_to_resource(node, 0, &res); + if (err < 0) + panic("Cannot get 'bootrom' node address"); + + if (res.start != AXP_BOOTROM_BASE|| + resource_size(&res) != AXP_BOOTROM_SIZE) + panic("The address for the BootROM is incorrect"); } struct smp_operations armada_xp_smp_ops __initdata = {