From patchwork Thu Jun 27 14:03:54 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Jensen X-Patchwork-Id: 2793841 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A60A1BF4A1 for ; Thu, 27 Jun 2013 14:05:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B786F2039F for ; Thu, 27 Jun 2013 14:05:07 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 507BB20398 for ; Thu, 27 Jun 2013 14:05:06 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UsCoi-00047k-OM; Thu, 27 Jun 2013 14:04:57 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UsCog-0002Nl-8X; Thu, 27 Jun 2013 14:04:54 +0000 Received: from mail-la0-x22c.google.com ([2a00:1450:4010:c03::22c]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UsCod-0002Mz-Pr for linux-arm-kernel@lists.infradead.org; Thu, 27 Jun 2013 14:04:52 +0000 Received: by mail-la0-f44.google.com with SMTP id er20so883341lab.17 for ; Thu, 27 Jun 2013 07:04:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer; bh=FTC77Yl0ulc0kF6HsownqGT2lY+F1C9jkvsJkXfAj7k=; b=jTH9E4IvERCRzmusku6fJeKxDpG79lDQbJVUq4VSmBNzl3pO+c65CAVbGyc0M4DzZE BwR4kas+X1bM2IUI6jdUWQzN3u/SRwNFPSUTDx+/rURqrr3nmfo9bAajnTNt308WJOpZ xyPa8XwPAckO71/z+gBSh7lPsiTzBjcpjQEv+b9K330iIAA+7FgvsE7/50efoVYQZBeZ AA60HIk8frNQ5bZlbsISCn068F1zX0GSF7zr4Urf+if2tdQqPBrre15/2JgIPD2XuKG3 hOQ0zk3mGCMU5aMGOjAzOJLUmva0edU7utfhjzYtS5Sl5Iof6k9egB8433w7KsagIBuK UtWg== X-Received: by 10.152.29.41 with SMTP id g9mr4312506lah.44.1372341869415; Thu, 27 Jun 2013 07:04:29 -0700 (PDT) Received: from Ildjarn.ildjarn.botech.se (static-213-115-41-10.sme.bredbandsbolaget.se. [213.115.41.10]) by mx.google.com with ESMTPSA id 6sm1197489lbu.13.2013.06.27.07.04.26 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 27 Jun 2013 07:04:28 -0700 (PDT) From: Jonas Jensen To: linux-arm-kernel@lists.infradead.org Subject: [PATCH] clk: add MOXA ART SoCs clock driver Date: Thu, 27 Jun 2013 16:03:54 +0200 Message-Id: <1372341834-6557-1-git-send-email-jonas.jensen@gmail.com> X-Mailer: git-send-email 1.8.2.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130627_100451_998807_1EF27EE1 X-CRM114-Status: GOOD ( 16.82 ) X-Spam-Score: -2.0 (--) Cc: arm@kernel.org, mturquette@linaro.org, linux-kernel@vger.kernel.org, Jonas Jensen X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds MOXA ART SoCs clock driver support. Signed-off-by: Jonas Jensen --- Notes: Applies to next-20130619 drivers/clk/Makefile | 1 + drivers/clk/clk-moxart.c | 141 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 142 insertions(+) create mode 100644 drivers/clk/clk-moxart.c diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index f41e3e3..92e4532 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -31,6 +31,7 @@ obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o obj-$(CONFIG_ARCH_ZYNQ) += zynq/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-$(CONFIG_PLAT_SAMSUNG) += samsung/ +obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o obj-$(CONFIG_X86) += x86/ diff --git a/drivers/clk/clk-moxart.c b/drivers/clk/clk-moxart.c new file mode 100644 index 0000000..893a63b --- /dev/null +++ b/drivers/clk/clk-moxart.c @@ -0,0 +1,141 @@ +/* + * MOXA ART SoCs clock driver. + * + * Copyright (C) 2013 Jonas Jensen + * + * Jonas Jensen + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_SPINLOCK(_lock); + +struct clk_device { + struct clk_hw hw; + void __iomem *reg_pmu; + spinlock_t *lock; +}; + +static unsigned long moxart_recalc_rate(struct clk_hw *c_hw, + unsigned long parent_rate) +{ + unsigned int mul, val, div; + unsigned long ret; + struct clk_device *dev_clk = container_of(c_hw, struct clk_device, hw); + + mul = (readl(dev_clk->reg_pmu + 0x30) >> 3) & 0x1ff; + val = (readl(dev_clk->reg_pmu + 0x0c) >> 4) & 0x7; + + switch (val) { + case 0: + div = 2; + break; + case 1: + div = 3; + break; + case 2: + div = 4; + break; + case 3: + div = 6; + break; + case 4: + div = 8; + break; + default: + div = 2; + break; + } + + ret = (mul * 1200000 / div); + + /* UC-7112-LX: ret=48000000 mul=80 div=2 val=0 */ + pr_debug("%s: ret=%lu mul=%d div=%d val=%d\n", + __func__, ret, mul, div, val); + return ret; +} + +static const struct clk_ops moxart_clk_ops = { + .recalc_rate = moxart_recalc_rate, +}; + +static const struct of_device_id moxart_pmu_match[] = { + { .compatible = "moxa,moxart-pmu" }, + { }, +}; + +static const struct of_device_id moxart_sysclk_match[] = { + { .compatible = "moxa,moxart-sysclk" }, + { } +}; + +void __init moxart_of_clk_init(void) +{ + struct device_node *node, *clk_node; + struct clk *clk; + struct clk_device *dev_clk; + struct clk_init_data init; + int err; + const char *clk_name; + + dev_clk = kzalloc(sizeof(*dev_clk), GFP_KERNEL); + if (WARN_ON(!dev_clk)) + return; + + dev_clk->lock = &_lock; + + node = of_find_matching_node(NULL, moxart_pmu_match); + if (!node) { + pr_err("%s: can't find PMU DT node\n", __func__); + return; + } + + dev_clk->reg_pmu = of_iomap(node, 0); + if (IS_ERR(dev_clk->reg_pmu)) { + pr_err("%s: of_iomap failed\n", __func__); + return; + } + + clk_node = of_find_matching_node(NULL, moxart_sysclk_match); + if (!clk_node) { + pr_err("%s: can't find sys_clk DT node\n", __func__); + return; + } + + clk_name = clk_node->name; + + of_property_read_string(clk_node, "clock-output-names", + &clk_name); + + init.name = clk_name; + init.ops = &moxart_clk_ops; + init.flags = CLK_IS_ROOT; + init.num_parents = 0; + + dev_clk->hw.init = &init; + + clk = clk_register(NULL, &dev_clk->hw); + + if (WARN_ON(IS_ERR(clk))) { + kfree(dev_clk); + return; + } + + clk_register_clkdev(clk, NULL, clk_name); + + err = of_clk_add_provider(clk_node, of_clk_src_simple_get, clk); + + pr_info("%s: %s finished\n", node->full_name, __func__); +}