From patchwork Thu Jul 4 14:45:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Jensen X-Patchwork-Id: 2823842 Return-Path: X-Original-To: patchwork-linux-arm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CD000BF4A1 for ; Thu, 4 Jul 2013 14:47:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2C25D20157 for ; Thu, 4 Jul 2013 14:47:02 +0000 (UTC) Received: from casper.infradead.org (casper.infradead.org [85.118.1.10]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 656C220118 for ; Thu, 4 Jul 2013 14:47:00 +0000 (UTC) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UuknL-0003Ed-KR; Thu, 04 Jul 2013 14:46:04 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uukn9-0002bn-GD; Thu, 04 Jul 2013 14:45:51 +0000 Received: from mail-la0-x231.google.com ([2a00:1450:4010:c03::231]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Uukn6-0002a4-4g for linux-arm-kernel@lists.infradead.org; Thu, 04 Jul 2013 14:45:49 +0000 Received: by mail-la0-f49.google.com with SMTP id ea20so1283698lab.22 for ; Thu, 04 Jul 2013 07:45:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=KS6f9VjkH3WJYGqYUXaZciE5pmVOkE4OBiqGXU7AC4k=; b=mlqui3K19Bp5Ric5bqW3S2RzvTfRnNgbzd7Y5psVKMYE183kwBJ878OSPrThEVZnR7 mx0+daB5Kpq6nesC/iMLfs5J0JqOER9njx+AM3nuxcYHKi3nSbAeAa/kli7jOLo4lSLL qpzSSZO3McMQviOcGhjUdLAZZbJMOeS1BavBdcJfj7Oa1yWbIwYsh7dWNd/z3sShaZ06 3lcare1bYWePksBUhbR+3Q8ALGxHZ8/lqsoRa0eQ7EuTYQ4yDXC7HUbblRaPKFrGzXEf RRzO2OVEKvqffi4c/9ermdhbLSqyXmaZV12CtY0igVkAzm/JkGuNE8ROjdisgrwxCe+6 rK0Q== X-Received: by 10.152.4.137 with SMTP id k9mr3112202lak.11.1372949125699; Thu, 04 Jul 2013 07:45:25 -0700 (PDT) Received: from Ildjarn.ildjarn.botech.se (static-213-115-41-10.sme.bredbandsbolaget.se. [213.115.41.10]) by mx.google.com with ESMTPSA id n17sm1402103lbv.2.2013.07.04.07.45.23 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 04 Jul 2013 07:45:24 -0700 (PDT) From: Jonas Jensen To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 2/4] ARM: mach-moxart: add MOXA ART device tree files Date: Thu, 4 Jul 2013 16:45:15 +0200 Message-Id: <1372949115-8190-1-git-send-email-jonas.jensen@gmail.com> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1371040448-28742-3-git-send-email-jonas.jensen@gmail.com> References: <1371040448-28742-3-git-send-email-jonas.jensen@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130704_104548_519617_AA3EA06E X-CRM114-Status: GOOD ( 15.30 ) X-Spam-Score: -2.0 (--) Cc: linux@arm.linux.org.uk, arnd@arndb.de, devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, Jonas Jensen , arm@kernel.org, olof@lixom.net X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add generic SoC include and UC-7112-LX platform device tree files and documentation. Signed-off-by: Jonas Jensen --- Notes: Applies to next-20130703 Changes since v2: 1. add and update documentation, new drivers: mmc, mac, rtc, watchdog, gpio, core-clock, apb-clock .../bindings/arm/moxart/moxa,moxart-apb-clock.txt | 18 +++++ .../devicetree/bindings/arm/moxart/moxart.txt | 12 ++++ .../bindings/clock/moxa,moxart-core-clock | 19 +++++ .../devicetree/bindings/gpio/moxa,moxart-gpio.txt | 16 +++++ .../interrupt-controller/moxa,moxart-ic.txt | 28 ++++++++ .../devicetree/bindings/mmc/moxa,moxart-mmc.txt | 17 +++++ .../devicetree/bindings/net/moxa,moxart-mac.txt | 25 +++++++ .../devicetree/bindings/rtc/moxa,moxart-rtc.txt | 11 +++ .../bindings/timer/moxa,moxart-timer.txt | 17 +++++ .../bindings/watchdog/moxa,moxart-watchdog.txt | 15 ++++ arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/moxart-uc7112lx.dts | 82 ++++++++++++++++++++++ arch/arm/boot/dts/moxart.dtsi | 79 +++++++++++++++++++++ 13 files changed, 340 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/moxart/moxa,moxart-apb-clock.txt create mode 100644 Documentation/devicetree/bindings/arm/moxart/moxart.txt create mode 100644 Documentation/devicetree/bindings/clock/moxa,moxart-core-clock create mode 100644 Documentation/devicetree/bindings/gpio/moxa,moxart-gpio.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/moxa,moxart-ic.txt create mode 100644 Documentation/devicetree/bindings/mmc/moxa,moxart-mmc.txt create mode 100644 Documentation/devicetree/bindings/net/moxa,moxart-mac.txt create mode 100644 Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt create mode 100644 Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt create mode 100644 Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt create mode 100644 arch/arm/boot/dts/moxart-uc7112lx.dts create mode 100644 arch/arm/boot/dts/moxart.dtsi diff --git a/Documentation/devicetree/bindings/arm/moxart/moxa,moxart-apb-clock.txt b/Documentation/devicetree/bindings/arm/moxart/moxa,moxart-apb-clock.txt new file mode 100644 index 0000000..f6e88fc --- /dev/null +++ b/Documentation/devicetree/bindings/arm/moxart/moxa,moxart-apb-clock.txt @@ -0,0 +1,18 @@ +MOXA ART APB clock + +Required properties: + +- compatible : Should be "moxa,moxart-apb-clock" +- #clock-cells : Should be 0 + +Example: + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + clkapb: clkapb { + compatible = "moxa,moxart-apb-clock"; + #clock-cells = <0>; + }; + }; diff --git a/Documentation/devicetree/bindings/arm/moxart/moxart.txt b/Documentation/devicetree/bindings/arm/moxart/moxart.txt new file mode 100644 index 0000000..11087ed --- /dev/null +++ b/Documentation/devicetree/bindings/arm/moxart/moxart.txt @@ -0,0 +1,12 @@ +MOXA ART device tree bindings + +Boards with the MOXA ART SoC shall have the following properties: + +Required root node property: + +compatible = "moxa,moxart"; + +Boards: + +- UC-7112-LX: embedded computer + compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart" diff --git a/Documentation/devicetree/bindings/clock/moxa,moxart-core-clock b/Documentation/devicetree/bindings/clock/moxa,moxart-core-clock new file mode 100644 index 0000000..cf69361 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/moxa,moxart-core-clock @@ -0,0 +1,19 @@ +Device Tree Clock bindings for arch-moxart + +This binding uses the common clock binding[1]. + +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt + +MOXA ART SoCs allow to determine core clock frequencies by reading +a register. + +Required properties: +- compatible : Should be "moxa,moxart-core-clock" +- reg : Should contain registers location and length + +For example: + + clk: core-clock@98100000 { + compatible = "moxa,moxart-core-clock"; + reg = <0x98100000 0x34>; + }; diff --git a/Documentation/devicetree/bindings/gpio/moxa,moxart-gpio.txt b/Documentation/devicetree/bindings/gpio/moxa,moxart-gpio.txt new file mode 100644 index 0000000..1be5875 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/moxa,moxart-gpio.txt @@ -0,0 +1,16 @@ +MOXA ART GPIO Controller + +Required properties: + +- compatible : Should be "moxa,moxart-gpio" +- reg : Should contain registers location and length + index 0 : input, output, and direction control + index 1 : enable/disable individual pins, pin 0-31 + +Example: + + gpio: gpio@98700000 { + compatible = "moxa,moxart-gpio"; + reg = <0x98700000 0xC>, + <0x98100100 0x4>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/moxa,moxart-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/moxa,moxart-ic.txt new file mode 100644 index 0000000..58f1fe1 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/moxa,moxart-ic.txt @@ -0,0 +1,28 @@ +* MOXA ART Interrupt Controller + +MOXA ART Interrupt Controller (moxart-ic) is used on MOXA ART SoCs +and supports 32 non-configurable number of interrupts + +Main node required properties: + +- compatible : "moxa,moxart-ic" +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The type shall be a and the value shall be 2. + + The first cell contains the interrupt number in the range [0-31]. + The second cell contains the interrupt type + +- reg: physical base address and size of the intc registers map. +- interrupt-mask: Specifies if the interrupt is edge or level-triggered + each bit represent an interrupt 0-31 where 1 signify edge + +Example: + + intc: interrupt-controller@98800000 { + compatible = "moxa,moxart-ic"; + reg = <0x98800000 0x38>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-mask = <0x00080000>; + }; diff --git a/Documentation/devicetree/bindings/mmc/moxa,moxart-mmc.txt b/Documentation/devicetree/bindings/mmc/moxa,moxart-mmc.txt new file mode 100644 index 0000000..7cd7bd6 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/moxa,moxart-mmc.txt @@ -0,0 +1,17 @@ +MOXA ART SD Host Controller Interface + +Required properties: + +- compatible : Should be "moxa,moxart-mmc" +- reg : Should contain registers location and length +- interrupts : Should contain the interrupt number +- clocks : Should contain phandle for the internal bus clock "tclk" + +Example: + + mmc: mmc@98e00000 { + compatible = "moxa,moxart-mmc"; + reg = <0x98e00000 0x0000005C>; + interrupts = <5 0>; + clocks = <&tclk>; + }; diff --git a/Documentation/devicetree/bindings/net/moxa,moxart-mac.txt b/Documentation/devicetree/bindings/net/moxa,moxart-mac.txt new file mode 100644 index 0000000..8be75cd --- /dev/null +++ b/Documentation/devicetree/bindings/net/moxa,moxart-mac.txt @@ -0,0 +1,25 @@ +MOXA ART Ethernet Controller + +Required properties: + +- compatible : Should be "moxa,moxart-mac" +- reg : Should contain registers location and length + index 0 : main register + index 1 : mac address (stored on flash) +- interrupts : Should contain the mac interrupt number + +Example: + + mac0: mac@90900000 { + compatible = "moxa,moxart-mac"; + reg = <0x90900000 0x1000>, + <0x80000050 0x6>; + interrupts = <25 0>; + }; + + mac1: mac@92000000 { + compatible = "moxa,moxart-mac"; + reg = <0x92000000 0x1000>, + <0x80000056 0x6>; + interrupts = <27 0>; + }; diff --git a/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt b/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt new file mode 100644 index 0000000..65f632c --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt @@ -0,0 +1,11 @@ +MOXA ART real-time clock + +Required properties: + +- compatible : Should be "moxa,moxart-rtc" + +Example: + + rtc: rtc { + compatible = "moxa,moxart-rtc"; + }; diff --git a/Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt b/Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt new file mode 100644 index 0000000..9015b88 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/moxa,moxart-timer.txt @@ -0,0 +1,17 @@ +MOXA ART timer + +Required properties: + +- compatible : Should be "moxa,moxart-timer" +- reg : Should contain registers location and length +- interrupts : Should contain the timer interrupt number +- clocks : Should contain phandle for the internal bus clock "tclk" + +Example: + + timer: timer@98400000 { + compatible = "moxa,moxart-timer"; + reg = <0x98400000 0x10>; + interrupts = <19 1>; + clocks = <&tclk>; + }; diff --git a/Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt b/Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt new file mode 100644 index 0000000..00a23b9 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/moxa,moxart-watchdog.txt @@ -0,0 +1,15 @@ +MOXA ART Watchdog timer + +Required properties: + +- compatible : Should be "moxa,moxart-watchdog" +- reg : Should contain registers location and length +- clocks : Should contain phandle for the internal bus clock "tclk" + +Example: + + watchdog: watchdog@98500000 { + compatible = "moxa,moxart-watchdog"; + reg = <0x98500000 0x10>; + clocks = <&tclk>; + }; diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 2cec2ff..66d4d73 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -96,6 +96,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \ kirkwood-ts219-6282.dtb \ kirkwood-openblocks_a6.dtb dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb +dtb-$(CONFIG_ARCH_MOXART) += moxart-uc7112lx.dtb dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \ msm8960-cdp.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ diff --git a/arch/arm/boot/dts/moxart-uc7112lx.dts b/arch/arm/boot/dts/moxart-uc7112lx.dts new file mode 100644 index 0000000..db65575 --- /dev/null +++ b/arch/arm/boot/dts/moxart-uc7112lx.dts @@ -0,0 +1,82 @@ +/* moxart-uc7112lx.dts - Device Tree file for MOXA UC-7112-LX + * + * Copyright (C) 2013 Jonas Jensen + * + * Licensed under GPLv2 or later. + */ + +/dts-v1/; +/include/ "moxart.dtsi" + +/ { + model = "MOXA UC-7112-LX"; + compatible = "moxa,moxart-uc-7112-lx", "moxa,moxart"; + + memory { + /* SAMSUNG K4S561632J-UC75 */ + device_type = "memory"; + reg = <0x0 0x2000000>; + }; + + flash@80000000,0 { + /* JS28F128 J3D75 A9087684 + * Numonyx Embedded Flash Memory (J3 v. D) + */ + compatible = "numonyx,js28f128", "cfi-flash"; + reg = <0x80000000 0x1000000>; + bank-width = <2>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "bootloader"; + reg = <0x0 0x40000>; + }; + partition@40000 { + label = "linux kernel"; + reg = <0x40000 0x1C0000>; + }; + partition@200000 { + label = "root filesystem"; + reg = <0x200000 0x800000>; + }; + partition@a00000 { + label = "user filesystem"; + reg = <0xa00000 0x600000>; + }; + }; + + mmc: mmc@98e00000 { + compatible = "moxa,moxart-mmc"; + reg = <0x98e00000 0x5C>; + interrupts = <5 0>; + clocks = <&clkapb>; + }; + + mac0: mac@90900000 { + compatible = "moxa,moxart-mac"; + reg = <0x90900000 0x100>, + <0x80000050 0x6>; + interrupts = <25 0>; + }; + + mac1: mac@92000000 { + compatible = "moxa,moxart-mac"; + reg = <0x92000000 0x100>, + <0x80000056 0x6>; + interrupts = <27 0>; + }; + + uart0: uart@98200000 { + compatible = "ns16550a"; + reg = <0x98200000 0x20>; + interrupts = <31 8>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <14745600>; + status = "okay"; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rootfstype=jffs2 rw"; + }; +}; diff --git a/arch/arm/boot/dts/moxart.dtsi b/arch/arm/boot/dts/moxart.dtsi new file mode 100644 index 0000000..40f20f3 --- /dev/null +++ b/arch/arm/boot/dts/moxart.dtsi @@ -0,0 +1,79 @@ +/* moxart.dtsi - Device Tree Include file for MOXA ART family SoC + * + * Copyright (C) 2013 Jonas Jensen + * + * Licensed under GPLv2 or later. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "moxa,moxart"; + model = "MOXART"; + interrupt-parent = <&intc>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "faraday,fa526"; + reg = <0>; + }; + }; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + clkapb: clkapb { + compatible = "moxa,moxart-apb-clock"; + #clock-cells = <0>; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x90000000 0x10000000>; + ranges; + + intc: interrupt-controller@98800000 { + compatible = "moxa,moxart-ic"; + reg = <0x98800000 0x38>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-mask = <0x00080000>; + }; + + clk: core-clock@98100000 { + compatible = "moxa,moxart-core-clock"; + reg = <0x98100000 0x34>; + }; + + timer: timer@98400000 { + compatible = "moxa,moxart-timer"; + reg = <0x98400000 0x42>; + interrupts = <19 1>; + clocks = <&clkapb>; + }; + + gpio: gpio@98700000 { + compatible = "moxa,moxart-gpio"; + reg = <0x98700000 0xC>, + <0x98100100 0x4>; + }; + + rtc: rtc { + compatible = "moxa,moxart-rtc"; + }; + + watchdog: watchdog@98500000 { + compatible = "moxa,moxart-watchdog"; + reg = <0x98500000 0x10>; + clocks = <&clkapb>; + }; + }; +};